STM32L010K4: can't change USART2SEL-bits in RCC->CCIPR

[GernotM]

Hi,

after encountering the problem with my non-CMSIS-based project, I tried to just set up a simple project in CubeMX, just activating the USART2 and selecting HSI16 as clk-source for the USART.

Starting the debugger shows, as already seen in my original project, that RCC->CCIPR.USART2SEL0 and USARTSEL1 are remaining 0 even the clk-source is selected OK:

void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
  /** Configure the main internal regulator output voltage 
  */
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_MSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  RCC_OscInitStruct.MSIState = RCC_MSI_ON;
  RCC_OscInitStruct.MSICalibrationValue = 0;
  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
  {
    Error_Handler();
  }
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
  PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_HSI;
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  {
    Error_Handler();
  }
}

Even trying to change the bits in the debugger failes. Writing 0xFFFFFFFF to the register results in 0x000C3C00 which are the LPTIM1SEL, I2C1SEL and LPUART1SEL selection bits but not in USART2SEL.

Any Idea of what's going wrong?

Thank

Gernot

[Uwe Bonnes]

Is USART2 perhaps already enable? Is the clock you want to select already on?

[waclawek.jan]

Note, that the clock tree diagram does not include a mux for USART2 clock.

IMO, this is a copy/paste error, and there's no such switch in the 'L010.

@Imen DAHMEN​  , can you please have a look at this? Thanks.

JW

[GernotM]

Thanks for the answer but which diagram do you mean?

In RM0451 DocID031151 Rev 1, page 145 as well as on the DS12323 Rev 3, it is shown a (single) MUX for LPUART/UARTCLK. RM mentions UARTSEL-bits in description of RCC as well as in the UASTR-section on page 576 , STMcubeMX 5.4.0 shows MUX and allows selection of LSE for USART2, nothing is mentioned in the errata.

What furter documents have to be read before failing with the new designed hardware which relies on LSE clocking for USART2?

Best regards

Gernot

[waclawek.jan]

Yes I meant the clock tree you are referring to. Indeed, UARTCLK is mentioned there as you've said.

So, besides the ideas Uwe brought up above, can you please try to switch the LPUART1SEL bits, and observe whether that does or does not affect the USART clock?

JW

PS. Please change your username to a normal nick.

[GernotM]

I checked: changing the LPUARTSEL-bits does not affect the USART. It seems, those bits are just not available and USART2 always runs with the APB1-CLK (a change here also changes the baud-rate).

This would also imply, that USART2 is not capable to wake the MCU from STOP despite from what is written in the RM (not needed in my design).

GM

[waclawek.jan]

Humm, humm....

JW