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STM32H7R3 and DMA speed

wadi
Associate II

I want to use fastest STM32H7R3 at 600MHz clock.

I need to use 60Mbytes/s short term DMA transfer from GPIO data 8-bit bus to RAM (about 1kbytes stream), driven from external clock, with up/down external clock slope (30MHz external clock with upslope /down data trigger)

Is it possible to achive such transfer ? How fast DMA Periph GPIO to RAM can be? How may clock is needed to make one byte (CPU has only to do only this thing, and after 1Kbyte have time to make some calculations)

with regards,

1 REPLY 1

You'd need to check the plumbing, but the other H7 device were a lot slower than that based on the buses the GPIO and memory were on. Closer to 8-10 MHz than 60 MHz

The external interfaces aren't running anywhere close to 600MHz, and the pin drivers probably 100 MHz or less.

Could you use the FMC with write to a Latch? 24-bit address, 32-bit data, parallel interface

A FIFO memory?

 

Parallel synchronous slave interface (PSSI)
The PSSI is a generic synchronous 8-/16-bit parallel data input/output slave interface. It allows the transmitter to send a data valid signal to indicate when the data is valid, and the receiver to output a flow control signal to indicate when it is ready to sample the data.
The PSSI main features are:
• Slave mode operation
• 8- or 16-bit parallel data input or output
• 8-word (32-byte) FIFO
• Data enable (DE) alternate function input and Ready (RDY) alternate function output.


When enabled, these signals can either allow the transmitter to indicate when the data is valid or the receiver to indicate when it is ready to sample the data, or both.


The PSSI shares most of the circuitry with the digital camera interface (DCMIPP). It thus
cannot be used simultaneously with the DCMIPP.

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