Hi Community,
During a project we are using the microcontroller STM32H7B0RBT6 with QSPI PSRAM APS6404L-3SQR , it works fine in indirect mode either in quad read and quad write, but the issue is with the write in memory mapped mode when trying to write less than 8 byte, one for example (*((uint8_t*) (0x90000010))=0x55;) the 7 others bytes are zeroed it seems that the write accept only 8 bytes if the data is less than 8 the other bytes are zeroed as you can see :
instead written 8 bytes (*((uint64_t*) (0x90000010))=0xA5A5A5A5A5A5A5A5ULL;) works fine !!
Did someone face a similar problem could please provide some suggestions to do, thanks,
Here I share the code that I have used to enable the memory mapped mode
OSPI_MemoryMappedTypeDef sMemMappedCfg = {0};
OSPI_RegularCmdTypeDef sCommand = {0};
/* set command to write to qspi ram */
sCommand.OperationType = HAL_OSPI_OPTYPE_WRITE_CFG;
sCommand.FlashId = HAL_OSPI_FLASH_ID_1;
sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_4_LINES;
sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE;
sCommand.AddressMode = HAL_OSPI_ADDRESS_4_LINES;
sCommand.AddressSize = HAL_OSPI_ADDRESS_24_BITS;
sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE;
sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = HAL_OSPI_DATA_4_LINES;
sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE;
sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; /* Memory-mapped write error response when DQS output is disabled */
sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
sCommand.Instruction = QUAD_WRITE_DATA_CMD;
sCommand.Address = 0;
sCommand.NbData = 0;
sCommand.DummyCycles = 0;
if (HAL_OSPI_Command(&hospi1, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
/* set command to read from spi ram */
sCommand.DQSMode = HAL_OSPI_DQS_DISABLE;
sCommand.OperationType = HAL_OSPI_OPTYPE_READ_CFG;
sCommand.Instruction = FAST_READ_QUAD_DATA_CMD;
sCommand.DummyCycles = 6;
if (HAL_OSPI_Command(&hospi1, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
/* set up memory mapping */
/* release nCS after access, else no refresh */
sMemMappedCfg.TimeOutActivation = HAL_OSPI_TIMEOUT_COUNTER_ENABLE;
sMemMappedCfg.TimeOutPeriod = 1;
if (HAL_OSPI_MemoryMapped(&hospi1, &sMemMappedCfg) != HAL_OK)
{
Error_Handler();
}
Hi,
which memory PN are you looking for ?
Let me just remind that STM32H7B0 supports OPI (APS6408L)... and QSPI DDR (APS12808O-DQ) full spec but have a memory mapped write limitation for QSPI SDR (APS6404L...)
Thanks
Alex
PS: Overview of IoT RAM (QSPI, OPI & HPI PSRAM) support
| STM32 MCU family | HPI/OPI | OPI | QSPI SDR | QSPI DDR | Comment |
| STM32L4Rx | - | ✓* | - | - | *avoid odd address write issue - ADMUX recommended |
| STM32L5 STM32L4P5/Q5 STM32U575/585 STM32H5 | - | ✓ | ✓ | ✓ | |
| STM32H7A3/B3 STM32H72x/3x | - | ✓ | ✓* | ✓ | * doesn't support QSPI SDR Memory mapped Write mode |
| STM32U59x/U5Ax, STM32U5Fx/U5Gx STM32H7Rx/Sx | ✓ | ✓ | ✓ | ✓ | |
| All STM32 supporting NOR QSPI | - | - | ✓* | - | * doesn't support QSPI SDR Memory mapped Write mode |
| APMemory device | 256Mb~512Mb 1.8V BGA24/WLCSP APS256XXN-OBR/OB9-... APS512XXN-OBR/OB9-... | 64Mb~512Mb 1.8V ~3V BGA24/WLCSP APS6408L-xOBM-... APS12808L-xOBM-BA APS12808O-OBR-WB APS25608N-OBR-BD APS51208N-OBR-BD | 16Mb~128Mb 1.8V ~3V SOP8/USON8/WLCSP APS1604M-xSQR-… APS6404L-xSQR-... APS12808O-SQRH-WA | 128Mb 1.8V WLCSP APS12808O-DQ-WA |
