Stm32H750 FDCAN Interrupt lines confused

[AresINSt]

In the stm32H750 reference munal, I can see the details of fdcan interrupt, mostly by config registers (FDCAN_ILS, FDCAN_ILE ), but I didn't see the illustration about which interrupt signal(like tx complete ) occurs in which interrupt line(line 0 or line 1).

Where can I get the relative detail information?

That's all, thanks.

[Imen.D]

Hello @AresINSt​ ,

Welcome to the STM32 Community :smiling_face_with_smiling_eyes:

I raised your question internally to clarify this point and add more details in the document.

I'll make sure to post more details here as soon as I hear back from our team.

Imen

[Imen.D]

For the FDCAN_ILS register, the interruption depends on the Bit (interrupt line 0 for Bit 0 and interrupt line 1 for Bit1)

For ILE, you can enable line interrupt line and choose the mapping as you want.

I request our team to clarify and improve the document on this topic.

Imen