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[STM32H745XI] - Crystal oscillator failure


There is a problem with the start-up of both HF (25MHz) and RTC(32k) oscillators after a turn-OFF followed by immediate turn-ON (cca couple ms).


  • EPSON FA-238
  • EPSON FA-135

The RTC crystal does not start-up at all and the HF one does show instability (duty cycle not 50%) resulting in cumulative error.

This bug gets worse with temperature(as expected).

I have found following in errata of this MCU:

The LSI clock might become unstable (duty cycle different from 50 %) and its maximum frequency can become significantly higher than 32 kHz, when:

The LSI oscillator clocks the RTC, or it clocks the clock security system (CSS) on LSE

  • (enabled when the LSECSSON bit of RCC_BDCR is set), and
  • the VDD power domain is reset while the backup domain is not reset, which happens:
    • if VBAT and VDD are separate and VDD is switched off and then on if VBAT is tied to VDD (internally in the package for products that do not feature the VBAT pin, or externally) and a short VDD drop under VDD(min) occurs (less than 1 ms).

The suggested workaround is following:

Apply one of the following measures:

  • Clock the RTC with LSE or HSE/RTCPRE, without using the CSS on LSE.
  • If the LSI oscillator clocks the RTC or when the LSECSSON bit is set, reset the backup domain upon each VDD power-up (when the BORRSTF flag is set in RCC_RSR).

These workarounds seem to have no effect.

The oscillators otherwise work perfectly. PCB layout is well done, loading by moderate capacity of 9pF.

Does anyone experience the same?


Thank you.

Chief II

> Does anyone experience the same?


  1. for rtc working, set LSE drive high level .
  2. if start after short power off not good, try : solder par. to VCAP (2uF...10uF) 470 ohm.


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Billy OWEN
ST Employee

Hi @RKrec.2​ 

This thread was marked as needing some direct technical assistance, and an internal support case has been created.

Please stand by and we will be in touch in just a moment.

Thank you for your interest in STMicro MCUs.




I appreciate that. Thank you.

Bouraoui Chemli
ST Employee

Hi @RKrec.2​ 

Could you refer to AN2867 Rev16? Special focus on section 3.4, make sure that Gm_crit_max (MCU) > gm_crit (crystal). Also, section 3.3 to calculate the external capacitors then fine tune.

As mentioned in RM0399 Rev 3, section 9.7.25, before writing into RCC_BDCR.LSEDRV to change the drive level. The BDCR write protection should be disabled.