STM32H745 Timer 2 Triggering Prematurely when using ITR1

[NBrick67]

I have set up TIM2 as a slave triggered by ITR1,  But have not started any other timers to generate a suitable TRGO to trigger TIM2.  However, when I run the software I can see an output from TIM2 as soon as it is started.

If I change TIM2 to be triggered by ITR0 I don't see any output, until I start TIM1 which sets it's TRGO.

Is there something else generating the ITR1? 

Can I clear any pending ITR1 before starting TIM2?

[NBrick67]

I have found the cause of the problem. 

I was using TIM1 to generate the ITR0 and TIM8 to generate the ITR1.

My configuration of the timers, prior to starting them was TIM1, TIM2, TIM8.  Although none of the timers has been started, TIM2 started running (CNT incrementing) when I configured TIM8.  Moving the configuration of TIM8 before TIM2 fixed the issue.

Any explanation?

[Claegtun]

What happens to the CEN bit in TIM2's CR1? I think that I came across the same problem, but I somehow fixed it without knowing how I did so.

[NBrick67]

With TIM2 configured before TIM8 the CEN bit of TIM2 CR1 gets set when TIM8 updates it's EGR:

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;

 It seems it is important to configure your timers in the reverse order of any triggers between them.

[Claegtun]

By configured, do you mean the MX_TIMx_Init() functions?

[NBrick67]

Yes

[Claegtun]

Hmm, not surprising since I remember a similar issue with DMA and U(S)ART. CubeMX would call the MX_DMA_Init() after the MX_UARTx_Init() in the automatically generated main.c.