STM32H743 SPI4 MISO pin not receiving data

[GreenGuy]

INFO:

STM32H743XIHx

STM32Cube FW_H7 V1.11.2

STM32CubeIDE Version: 1.14.1 - (have not updated to 1.15 due to being mid-project)

STM32CubeMX - Version: 6.10.0-RC9

SPI4 configuration:

I have verified the following:

1) The NSS, SCLK, MOSI, and MISO lines all have the correct levels at the correct time communicating to a MX9050 EEPROM device attempting to read the status byte. The MOSI line contains 0x05 and the MISO line contains 0xF0 in response as read using a O'scope.

2) The data received using the line:

Inst->status = HAL_SPI_TransmitReceive_IT(hspi, &TxBuf, &RxBuf, 2);

is all 0.

3) I have verified the trace going to PE5 (SPI4_MISO) (D1 - TFBGA240+25), as probed on the same side of the board that the STM32H743 is mounted, also shows the same MISO signal that appears on the connector going to the EEPROM device. The signal levels are good ruling out a poor solder joint.

4) I have tried setting the MISO line as pulled-up and pulled-down and can verify that when SPI4 is not being used, the trace on the same side of the board as the STM32H743 measures high when pulled-up and low when pulled-down.

5) I have verified that when the MISO line is pulled-up, the data received is still all 0.

6) Am not using DMA, and normally using D-Cache with proper cache handling. Turn D-Cache off does not change the received data.

7) I am using SPI1, SPI2 in Master full duplex to communicate with external DAC/ADC's and SPI5 to communicated with an FPGA. This all works with and without DMA fine.

The only conclusion I can come up with at this time given the steps taken thus far is that the data on SPI4 MISO pin is not finding it way from the fifo to memory and neither DMA nor Cache is the issue. I have also check the Errata for the STM32H7 and there is nothing indicated there that SPI4 has a related problem.

SPI connection to the EEPROM is critical to the design and SPI4 is the only spi resource left. This needs to work!

[tjaekel]

Disconnect the external chip and use a flying wire to connect MISO with MOSI (on MCU):
You should receive what you send.

If this fails: the MISO pin is not properly configured (a wrong pin used, a wrong ALT, ...).

This MOSI - MISO "short cut" should work before you try with an external chip connected.

Other reasons why it can fail:

• SPI mode is wrong (OK, you say it makes sense on scope)
• LSB vs. MSB is wrong (the external chip would not understand the command and might not respond)
• CS/NSS : low or high active? Most chips want to see CS going low on a new transaction, but also seen
  high active CS.
• SPI bitrate too fast (external chip gets bit errors)
• time between CS goes active (low) and first clock edge is too fast (external chip has a timing constraint),
  there is a config to increase the "gap"
• the cable is too long
• there is ringing on the SPI signals (not a correct impedance match, e.g. not using "serial termination")
• The VDD of MCU and external chip are different (e.g. MCU runs 3V3 but external chip uses 1V8, so that
  level shifters are needed)
• Sometimes, pull-ups are needed:
  a) if CS becomes floating - all is messed up
  b) if SCLK becomes floating - often the MCU SPI will release the bus - it takes time before SCLK has a
      "correct" level, when MCU starts driving again, but CS comes fast and cable is long

Check with a scope if the signals look correct, esp. the signal levels, signal integrity, ringing, setup and hold times...

[GreenGuy]

I removed the EEPROM part from the board and shorted MOSI to MISO.  The data sent was not returned.  The data returned was 0.

Here is the scope shot with the EEPROM mounted as probed at the EEPROM.

 I have verified that the MISO from the MCU to the EEPROM has good connectivity by configuring the MISO line in the MCU code with a pull-up and with a pull-down (2 different cases) and while the SPI4 is idle measure the MISO line at the EEPROM.  The measurement shows HIGH pulled-up case and LOW in the pulled-down case.  After removing the EEPROM and shorting the MOSI to MISO at the EEPROM location.  I repeated the the same cases and noted that inspecting the GPIOE, pins 5&6 show HIGH when pulled up and LOW when pulled down.

The connection is good.

I am certain at this point the the MCU SPI4 is broken!  Guess I will have to disable SPI4 and bit bang the EERPOM.  

[AScha.3]

(Just : i use the spi4 on H743VI , in 8 bit slave mode at about 24Mbit ; no problems so far .)

What i not understand:

you state : SPI4 is setup as 8bit .

but on top you show: 16b

What now ?

+

in timing diagram i see clk + data send on mosi ;

so what coming on miso then ? (and dont forget, you read from a fifo, not a static register. This works only 1x , then data away. -> 0x0. )

+

why you write: RXDR register is 0x000000000000F -

but RXDR is 32b , 0x00000000 ->

[GreenGuy]

That screen shot came from when I tried using 16 bit mode to see if there would be any difference.  Originally I had it set to 8bit.  Either way the result is the same.  Sorry for any confusion.

Agreed regarding FIFO.  I only check this to make sure the FIFO is getting the data and then reboot and run without viewing the FIFO.  I am uncertain if reading from the FIFO is a legitimate method, regardless the data is not propagating through.  We will see what the factory says.

Good to hear regarding the 743VI.   Hopefully what I am seeing is either an issue with how I configured the part or confined to the 743XIHx part.

[GreenGuy]

AScha.3 Question:

What is printed on the top of the part that you are using?

[AScha.3]

Just looked at the errata , spi ->

So just for fun : set prescaler 2 (lowest setting), give spi a slow (16M or 32M , what you need) clk from the pll divider, to see: changes this anything - or not.

btw

spi 1,2,3 have another clk source mux than spi 4,5 !  (i have clk for spi4 at 48M , also on spi2 prescaler 2)

[AScha.3]

STM32H743VIT6

V (revision)

PHL (from Phillipines probably)

[GreenGuy]

No change

[AScha.3]

Thats life...

I cannot test now on my H743 board, because ESP8266 on the spi4.

But i could test it tomorrow on a H743ZIT board, spi4 as full master, just mosi-miso loop.

Should i try ?

[GreenGuy]

If you have the time.  I would narrow down chip variants.

I have a case submitted and I or they may end up posting any ST findings.