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STM32H743 3ADC's With DMA

Kanna
Associate III

I have implemented 3 ADC with DMA. ADC1 with DMA1 stream 0 , ADC2 with DMA2 stream 0 and ADC3 with BDMA channel 0

Resolution : 16 bit , ADC clock : 7MHZ , Sample : 8.5 cycles

All these ADC are Time trigger for that i am using timer 1 as center aligned mode this timer will happen at every 20micro sec

how can i calculate the ADC total conversion time? and what i need to do for all the total conversion should happen within 20 micro sec?

8 REPLIES 8
Kanna
Associate III

@CPINA​  I would like to know your view on that

TDK
Guru

> STM32H743

> how can i calculate the ADC total conversion time?

ADCs are independent. Conversion time is listed in the reference manual (I think) as well as here:

https://www.st.com/resource/en/application_note/dm00628458-getting-started-with-the-stm32h7-series-mcu-16bit-adc-stmicroelectronics.pdf

0693W00000DlZEZQA3.png 

For 8.5sec sampling at 16 bits, conversion takes 8.5 + 16/2 + 0.5 = 17 cycles.

At 7MHz, that's 2.42 us.

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Kanna
Associate III

@TDK​ Thanks a bunch! Theoretical Calculation i can understand for practical scenario how to check the conversion time

i tried with callbacks count as per my observation my expectation callback count was 50000 but i am getting around 25000

if you please guide me how to test the conversion time in code that could be very helpful for me

Kanna
Associate III

For your consideration ,other configurations which i had,

Clock prescalar : Asynchronus clock mode divided by 1

Scan conversion mode : enabled

DMA circular mode

End of sequence conversion

TDK
Guru

> if you please guide me how to test the conversion time in code that could be very helpful for me

There's no way of exactly measuring conversion time in code, since code has overhead.

If you want to measure the number of conversions over a period of time, you can do so with DMA and the NDTR register.

> i tried with callbacks count as per my observation my expectation callback count was 50000 but i am getting around 25000

Implementing a callback (possibly 3) which are executed every 20us isn't a great solution, but probably can work if your system clock is maxed out.

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Kanna
Associate III

@TDK​ Can you please suggest the best configuration for all 3 ADC with 8 channel's conversion time within 20us?

and how to move ADC3 to DMAMUX1 for assigning different DMA (DMA1 or DMA2)

and i want to know any impact will happen if we use differnet dma without using MuxRequestGenerator?

HAL_DMAEx_EnableMuxRequestGenerator(); if i use this funtion i can get bdma only

TDK
Guru

> Can you please suggest the best configuration for all 3 ADC with 8 channel's conversion time within 20us?

The conversion time is listed above. Do the math to ensure they're all being completed in 20us. Seems like 8.5 sampling cycles works.

adc3_dma seems available on DMAMUX1 (dmamux1_req_in115).

Not sure about the other questions offhand.

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Kanna
Associate III

Dear @TDK​ could you please tell me how to configure oversampling in cubemx

as of now i have 12bit resolution ADC, need 16bit oversampling