STM32H7 Ultra slow RAM access time of 500kHz

[Linas L]

Hello, I am working on developing board where STM32H7 will talk via SRAM interface to FPGA and i hit the problem.

I use IAR ARM and H743I-EVAL SRAM example, and guess what, if i make simple loop with just single write to SRAM like this, I only get 500kHz Toggle frequency of chip select, even I write minimum numbers to FMC timings. (and 60ns long CS_LOW)

while(1)

{

   *(uint16_t *) (0x68000000) = i++;

}

Do i missing something ? STM32F4 could do nearly 50MHz with software access, and 8 times faster (2 times by clock) H7 could only do 500kHz ?????

Also, my code does not run if i don't use this code from example, i don't see any register settings inside FMC controller, but my code if i don't run this code doe not toggle CS pin, whats going on ? HALL status are just status for other programs, maybe DMA or interrupts, but not to hardware itself , right ? Or i missing something. ( i use same address as example)

/**
  * @brief  Writes 16-bit buffer to SRAM memory. 
  * @param  hsram: pointer to a SRAM_HandleTypeDef structure that contains
  *                the configuration information for SRAM module.
  * @param  pAddress: Pointer to write start address
  * @param  pSrcBuffer: Pointer to source buffer to write  
  * @param  BufferSize: Size of the buffer to write to memory
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
{
  __IO uint16_t * psramaddress = (uint16_t *)pAddress; 
  
  /* Check the SRAM controller state */
  if(hsram->State == HAL_SRAM_STATE_PROTECTED)
  {
    return  HAL_ERROR; 
  }
  
  /* Process Locked */
  __HAL_LOCK(hsram);
  
  /* Update the SRAM controller state */
  hsram->State = HAL_SRAM_STATE_BUSY; 
 
  /* Write data to memory */
  for(; BufferSize != 0; BufferSize--)
  {
    *(__IO uint16_t *)psramaddress = *pSrcBuffer; 
    pSrcBuffer++;
    psramaddress++;    
  }    
 
  /* Update the SRAM controller state */
  hsram->State = HAL_SRAM_STATE_READY; 
  
  /* Process unlocked */
  __HAL_UNLOCK(hsram);
    
  return HAL_OK;  
}

I like to work on SPL libraries, where stuff just work, with HALL, I get constant problems...

[Tesla DeLorean]

Make sure that it is not buffering or caching which might decimate or fold the repetitive write.​

[Linas L]

Disabling CPU I/D Cash does help a tiny bit, but still no where near >10MHz transfer rates...

Any more ideas ?

[Linas L]

Hm, bad news, even GPIO toggle with direct register writing is only generating 16.6MHz, while with STM32F4 i was getting over 50MHz. ( maximum optimization, no other code, just

  while (1)
  {
    GPIOB->BSRRL = 2;
    GPIOB->BSRRH = 2;
  }

This is due to different CPU with I/D caches or what ?

[Linas L]

Ok, so this is not that simple, Cortex H7 is cashing data so i need to use MPU.

But even with MPU enabled for non cashing mode for this memory reagon, i still geting only 12.8MT/s while STM32F4 could do >50MT/s