STM32G474 Flash wait states at 170MHz CPU clock

[Oblomkov.Ilya]

RM0440 Rev 3 (last version) recomend to set 4WS for 170MHz CPU clock

RM0440 Rev 2 recomend to set 8WS for 170MHz CPU clock

ST driver library (STM32G4xx_HAL_Driver) function LL_PLL_ConfigSystemClock_HSE() set 8WS for 170Mhz clock.

Which Flash WS setting is right for 170MHz, 4WS or 8WS?

[berendi]

I assume that the reference manual was updated for a reason.

The last update of RM0440 is more recent than the latest version of the library.

[waclawek.jan]

This is quite a dramatic change.

It would be nice to hear from ST, what's the reason for this change, and whether it's result of change described in PCN MDG/19/11871 - i.e. whether' it's applicable also for the older revision of the 'G4 chips or not.

@Amel NASRI​ , can we please have a comment on this?

JW

[Uwe Bonnes]

Where to get that PCN?

[waclawek.jan]

Some distributors make them available for the commoners, e.g. http://www.anglia.com/registration/pcn_ptn/docs/pcn/st_PCN%20MDG_19_11871.pdf

JW

[Singh.Harjit]

I found a copy here: https://www.mouser.com/PCN/STMicroelectronics_11871.pdf

[Uwe Bonnes]

Hopefully an updated errata sheet appears soon.

[hamdi.najoua · Accepted solution]

Hello,

The new specification is applicable to all STM32G4 family products.

In fact, the Flash is re-characterized and it is found that the maximum number of wait-states can be reduced from 8 to 4 wait states and so it is possible to achieve 170MHz at only 4 wait-states  which has an interesting impact on the performance.

This new specification will be taken into account in the STM32CubeG4 next version planned for W26.

Best regards,

Najoua.

[Singh.Harjit]

I'd love to hear about data on the performance improvement between the old and new settings for a few relevant workloads - could be the standard workloads, power consumption change, Field oriented control motor control implementation, etc.

[waclawek.jan]

Hi Najoua,

Thanks for the comment.

So, does this mean, that the 4WS applies also to the older revisions of the 'G4 chips?

Thanks,

JW

@hamdi.najoua​