STM32G431 PLL settings to get 170MHz

[Singular Engineer]

I have been working on a self learning project with STM32G431 controller. I am having trouble switching on the PLL to get 170MHz.

When I use the CubeIDE, I get the 170MHz clock.

Given below is my code on how I am trying to Initialize the PLL

//PLL settings to set the system clock to 170MHZ
void SystemClockConfig_170MHz()
{

	//Turn ON HSE and wait for it become ready
	RCC->CR |= RCC_CR_HSEON;
	while(!(RCC->CR & RCC_CR_HSERDY));

	RCC->CR |= RCC_CR_CSSON;

	//Turn OFF PLL before configuring PLL CFGR register
	RCC->CFGR &= ~(RCC_CR_PLLON);

	RCC->PLLCFGR = 0x00000000;
	//Configure PLL to 170MHz
	RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
	RCC->PLLCFGR |= 0x4 << RCC_PLLCFGR_PLLM_Pos;
	RCC->PLLCFGR |= 0x44 << RCC_PLLCFGR_PLLN_Pos;
	RCC->PLLCFGR |= 0x0 << RCC_PLLCFGR_PLLPEN_Pos;
	RCC->PLLCFGR |= 0x0 << RCC_PLLCFGR_PLLP_Pos;
	RCC->PLLCFGR |= 0x0 << RCC_PLLCFGR_PLLQEN_Pos;
	RCC->PLLCFGR |= 0x0 << RCC_PLLCFGR_PLLQ_Pos;
	RCC->PLLCFGR |= 0b1 << RCC_PLLCFGR_PLLREN_Pos;
	RCC->PLLCFGR |= 0b0 << RCC_PLLCFGR_PLLR_Pos;
	RCC->PLLCFGR |= 0x2 << RCC_PLLCFGR_PLLPDIV_Pos;//

	//Set Flash Wait latency to 4
	FLASH->ACR |= FLASH_ACR_LATENCY_4WS;

	//Turn ON PLL and Wait
	RCC->CR |= RCC_CR_PLLON;
	while(!(RCC->CR & RCC_CR_PLLRDY));

	//Switch to PLL
	RCC->CFGR |= RCC_CFGR_SW_PLL;
	while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
}

[STOne-32]

Dear @Singular Engineer ,

I believe the programming sequence  may not be optimal or not inline with the Reference Manual recommendations

For example this code : 

RCC->PLLCFGR = 0x00000000;

STM32G4 series advanced Arm<Sup>®</Sup>-based 32-bit MCUs - Reference manual  

Bit 15 Reserved, must be kept at reset value.  

See Page 291.  also  we need to follow the sequence of 6.1.5 Dynamic voltage scaling management

You can also debug and make a comparison on the assembly sequence from CubeIDE/MX .

Hope it helps you

STOne-32.