STM32G0 ADC behavior

[Carl_G]

When runnung the ADC in continuous mode, does the ADC clear the sampling cap after each read? Or does the ADC go into it's next read with the sampling cap still charged up to whatever the previous level was. Thus, potentially putting some slight amount of voltage out into the circuit if the circuits voltage happened to be lower?

[waclawek.jan]

The latter (and the voltage at the end of the conversion is not equal to the voltage at the beginning of conversion).

 That's the reason for the low-impedance signal source requirement.

JW

[Carl_G]

Im trying to save an IO and some components by running the ADC and the comparator on the same pin. This will be tricky if the ADC is spiking the circuit. I also don't see any GND channel selection. So either I

A. Tie a channel to GND and read it prior to this channel. Safe or should i go through resistor to GND?

B. Use two inputs. Add a ~5K resistor between ADC input and the circuit. Connect comparator input directly to circuit.

C. Use two inputs. Give the comparator its own voltage divider and filter input stage . Bit more leakage.

Recommendation?

[Carl_G]

Im leaning toward option "C".

[waclawek.jan · Accepted solution]

This of course depends on details of your application, and at any case, I suggest you to make an early prototype to proof your concept. Two separate amplifiers/buffers is the sure bet, but you apparently want to avoid that.

As I've said, the voltage on sampling capacitor at the beginning of next sampling is not equal to the previous sampling's result; it's influenced by the conversion process, too, so you may want to test the whole input range.

You may also want to explore the comparator blanking feature to suppress effect of the ADC sampling at the comparator's output side. This again may or may not be usable for your particular application.

JW

[Carl_G]

1 input with comparator blanking looks nice! Thanks.