STM32F769 DMA and Cache Issue

walk it back,

ICache shouldn't make a difference... but faster code...

Are you using delays or RTOS type task switching or statemachine ?

DCache,

Some memory areas cannot use DCache, you may have to move your buffer to another ram area.

so ICache doesn't kill it..... ??

Dear TJ,

Thanks for your reply.

I use Keil RTOS.

Should I assign DMA variable to absolute memory address?

But I don't know which memory area is for DCache? I use STM32F769.

Please advise.

Regards,

Thiha Kyaw

not sure on the details,

hopefully the professionals will help out there... Guys ?

Can you search on this site ?

DMA not working...

it is not an uncommon issue.

but resolved by moving the buffer to a different memory area by using a compiler directive( I think)

Guys ?

Caching and cache coherency is the staple of computer architecture classes.

Disabling caching in the blanket sense is going to be very damaging to performance.

Review the Data Sheets and Reference Manuals, pay attention to the block diagrams for the core, peripherals and buses.

The DTCMRAM is not cached, other memories/regions can be describe to the MPU so it doesn't cache them.

Finally you can flush and invalidate regions of memory, down to 32-byte granularity using CMSIS functions.

https://community.st.com/s/question/0D50X00009fEYKFSA4/how-do-i-use-halspireceivedma-in-conjunction-with-a-receive-buffer-on-the-stack-and-caching-enabled

And check the reference manual for memory regions unavailable to DMA, like so-called TCM areas.

This usually fails silently.

check the cube examples for the f769. there's plenty of examples of MPU configuration for various purposes