2019-09-28 11:54 AM
Hello I'm using a STM32F769 discovery board. I was trying to use timer2channel2 to trigger the ADC conversion. I am setting registers manually and wanted to turn on event generation on channel 2 match.
TIM2->EGR |= TIM_EGR_CC2G_Msk;
However when I ran the code it didn't work. I opened the debugger and discovered when I run that particular line of Code it is actually setting the same bit in the status register (TIm2->SR) has anyone else seen this problem? Is there any work around, or am I just missing something
heres my code for reference
void init_timer2(void)
{
//1. Clock
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN_Msk;
TIM2->PSC = 1600 -1;
TIM2->ARR = 10000;
TIM2->CNT = 0;
TIM2->CCR2 = 1000;
//now set up trigger, we are basically using compare mode
TIM2->EGR |= TIM_EGR_CC2G_Msk
| TIM_EGR_UG_Msk; //this doesn't work whenever you write to EGR it goes to SR register
TIM2->CCMR1 |= (0x01 << TIM_CCMR1_OC2M_Pos)//sets pin high on compare match
| (0x01 << TIM_CCMR1_OC2PE_Pos);//enable preload register?
TIM2->CCER |= TIM_CCER_CC2E_Msk;
//start timer
TIM2->CR1 |= TIM_CR1_CEN_Msk;
}
2019-09-28 12:50 PM
I don't quite understand what do you want to accomplish.
Setting bits in EGR register causes the respective internal signal to get active; one of the consequence of which is that respective SR bit gets set. Btw. you don't need to RMW the EGR register, simply write to it if you need to - which I doubt you need. Although you may want to set EGR.UG, as that's the way how the value you wrote into PSC gets used immediately after the timer starts - otherwise the first timer period would run at the reset setting of PSC=0.
Setting CCMRx.OCxM to 0b001 i.e. active-on-match means, that at the first time CNT matches CCRx, the respective output gets active and then it remains so indefinitely. It's maybe not what you want; you probably want one of the PWM modes.
Re-read the timer chapter. I know it's not written very comprehensibly but after several readings and several experiments things usually start to make sense.
JW
2019-09-28 02:28 PM
Hey JW,
Thanks for your response, it clears up a lot. From the reference manual I was thinking mode 0001 "set active on match" would generate a pulse, not a one time state change. I've switched to PWM mode and I'm getting periodic behavior like I wanted.
As for the EGR, I was thinking it enabled flag generation. I used to do a lot of atmel programming, where you have to set bits to enable flags/interrupts, so I thought that this was the same. I guess the flag is always generated as long as the timer is on. Now I see the EGR is for immediate one time flag generation.
Thanks again, I really appreciate it.