2024-04-15 08:29 AM
I have a question when I read the reference manual of STM32F405, and it says that "for odd values of RCR, if the RCR was written before starting the counter, the UEV occurs on the overflow (which should be underflow as I have seen in TIMx_RCR function description from STM32F103 to ST... - STMicroelectronics Community)
And the reference says that any write to the TIMx_RCR register is not taken in account until the next repetition update event . So my question is in center aligned mode if it is the first time we write the RCR after starting the counter and when will the first UEV happened ?
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2024-04-16 09:46 AM
Hi @Jerry_ ,
The internal RCR counter has to count 0-3-2-1-0-3-2-1-0-3-.... (or it may be an upcounter 0-1-2-3-0-1-2-3... it's the same), as its period is (RCR+1).
JW
2024-04-15 08:53 AM - edited 2024-04-15 08:55 AM
Hello @Jerry_, welcome to ST Community
As mentioned in the RM, In center-aligned mode, the UEV is generated on overflow or underflow event depending on when RCR was written.
Regarding your question (in case of writing to RCR after starting the timer), this is a step-by-step explanation:
From this point on, the counter will generate a UEV after the number of up/down cycles set by the RCR value.
Please note that If the RCR was written before starting the counter, the UEV occurs on the overflow(when it reaches ARR)
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2024-04-15 09:43 AM - edited 2024-04-15 09:50 AM
[EDIT] I've just dug out an old thread where I analyzed this question and posted it here... just to realize it's the same thread you've posted in the initial post.
Isn't the diagram I posted, and my whole dialogue there, clear enough?
As @Sarra.S wrote above, as RCR is preloaded, it's not taken into account until the first Update occurs after it's been written.
You can adopt the program I posted there to 'F4xx and experiment yourself.
JW
2024-04-15 07:06 PM
Hello @waclawek.jan ,in your diagram,1->∅ should generate an UEV , and the RCR in my opinion should be auto-reloaded to 3 , why it is reloaded to 3 the next overflow?
Jerry
2024-04-16 09:46 AM
Hi @Jerry_ ,
The internal RCR counter has to count 0-3-2-1-0-3-2-1-0-3-.... (or it may be an upcounter 0-1-2-3-0-1-2-3... it's the same), as its period is (RCR+1).
JW