Posted on May 19, 2017 at 01:02Issue:
USB Core issing interrupt at a rate of 8.65us causing high CPU loading.
Software/Chip:
Using USB Host/CDC from STM32Cube V1.15 on a STM32F429 board.
USB interrupt sources:
- SOF Interrupts (It is not needed for CDC type transfers) turned this interrupt off and still getting high interrupt rate.
This is configured in
HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
.....
/* Enable interrupts matching to the Host mode ONLY */
USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\
USB_OTG_GINTMSK_SOFM
|USB_OTG_GINTSTS_DISCINT|\
USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
return HAL_OK;
}
- NAK interrupts from bulk in endpoint. The issue is when the OTG USB gets enough NAKs from the bulk endpoint and issues an interrupt at a rate of 8.625us.
Solutions
?
Is there a work around that does not degrade USB performance? The STM32FH7 also has has the same code to re-enable the bulk in endpoint.
static void HCD_HC_IN_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
}
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_NAK)
{
if(hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
{
__HAL_HCD_UNMASK_HALT_HC_INT(chnum);
USB_HC_Halt(hhcd->Instance, chnum);
}
else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)||
(hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
{
/* re-activate the channel */
tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(chnum)->HCCHAR = tmpreg;
}
hhcd->hc[chnum].state = HC_NAK;
__HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
}
}
There are several postings about this issue (The first posting is the best description of the issue)
https://community.st.com/0D50X00009XkYz2SAF
https://community.st.com/0D50X00009XkYSSSA3
https://community.st.com/0D50X00009Xked0SAB
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