STM32F4, FSMC copies same data each 2 MB on external SRAM

[kostadin]

Posted on September 08, 2014 at 11:08

Hello there,

I am using IS61WV102416BLL external SRAM module. I got it working with a STM32F4 microcontroller. The problem now is that every time I write some data to the SRAM it is copied to an address with 2 MB Offset, i.e. if I write something on address 0x60000000 it is copied automatically on addresses 0x60200000. 0x60400000, 0x60800000 and so on. Is it possible or it is just the debug mode, that cannot display data correctly in the viewer? In that way I can only use 2 MB instead of the full 16 MB. Does anyone have a clue why is this happening? Thank you in advance! Best regards, Kostadin P.S. My init routine for the SRAM (using 20 address lines and 16 bit data width):

void
SRAM_Init(
void
){


GPIO_InitTypeDef GPIO_InitStructure;

FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;

FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructure;


/* Enable GPIO clock */

RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | 

RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOG, ENABLE);


/* Enable FSMC clock */

RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);


/*------------- begining of gpio init -------------*/

/* GPIOD */

GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC); 

GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource7, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);


GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | 

GPIO_Pin_5 | GPIO_Pin_7 | GPIO_Pin_8 | 

GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | 

GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | 

GPIO_Pin_15;


GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;

GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;


GPIO_Init(GPIOD, &GPIO_InitStructure);


/* GPIOE */

GPIO_PinAFConfig(GPIOE, GPIO_PinSource0, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource1, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource3, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource7, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource8, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource9, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource11, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource12, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource13, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource14, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOE, GPIO_PinSource15, GPIO_AF_FSMC);


GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_3 | 

GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | 

GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | 

GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;


GPIO_Init(GPIOE, &GPIO_InitStructure);


/* GPIOF */

GPIO_PinAFConfig(GPIOF, GPIO_PinSource0, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource1, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource2, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource3, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource4, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource5, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource12, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource13, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource14, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOF, GPIO_PinSource15, GPIO_AF_FSMC);


GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | 

GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | 

GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |

GPIO_Pin_15;


GPIO_Init(GPIOF, &GPIO_InitStructure);


/* GPIOG */

GPIO_PinAFConfig(GPIOG, GPIO_PinSource0, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOG, GPIO_PinSource1, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOG, GPIO_PinSource2, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOG, GPIO_PinSource3, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOG, GPIO_PinSource4, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOG, GPIO_PinSource5, GPIO_AF_FSMC);


GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | 

GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;


GPIO_Init(GPIOG, &GPIO_InitStructure);

/*------------- end of gpio init -------------*/


/*------------- Initialize FSMC controller -------------*/

FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_A;

FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime = 0;

FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime = 0;

FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime = 1;

// the next 3 params do not matter in case of an asynchronous SRAM

FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0; 

FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision = 0; 

FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency = 0; 


FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = 

FSMC_AsynchronousWait_Disable;

FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;

FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

//different timings for reading and writing

FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable; 

FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;

FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;

FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = 

&FSMC_NORSRAMTimingInitStructure;

FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;

FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = 

FSMC_WaitSignalActive_BeforeWaitState;

FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = 

FSMC_WaitSignalPolarity_Low;

FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;

FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;

FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = 

&FSMC_NORSRAMTimingInitStructure;


FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);


/* Enable the SRAM bank1 */

FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); 

/*------------- end of FSMC init -------------*/

}

#fsmc #stm32f4 #external-sram

[waclawek.jan]

Posted on September 08, 2014 at 11:42

IS61WV102416BLL is 16 megabit, i.e. 2 megabyte memory.

The 20 address lines indicates this, too (2^20 = 1 mega addresses, 16 bit = 2 bytes per address). JW

[ivani]

Posted on September 08, 2014 at 11:50

The IS61WV102416BLL occupies exactly 0x200000 (2MiB) bytes of the address space. 
 So, if there is no additional logic for decoding the higher addresses you will see (or will be able to write) the same physical locations at offsets of 0x200000

up to the end of the address range of the used chip select.

[kostadin]

Posted on September 08, 2014 at 11:56

Hello Jan,

of course it is so! *facepalm* My mistake, sorry. Best, Kostadin

[vishal patel]

Posted on February 27, 2017 at 12:01

 ,

 ,

Hi,

I am using 512kx16bit SRAM with STM32, you said we can access 2 byte per memory per one address, as SRAM has the 16bit wide data bus, But I can write only 1 byte on one address. 16 bit width of the data bus is for accessing the 16bit data simulteneously while data transfer only, It has not the actual data storage capacity of the 16 bit per one address.  ,

 ,

I have posted recently, about this problem,  ,I am missing something in understanding of accessing whole memory area. ,

I am using AS6C8016, which is 512kx16bit array SRAM. It has A0-A18 Address bus, so technically I can address only 524287 location, lets say 512K, And now according to you, If I can access 1 byte only per one location, then How can I access 1 MByte memory, [which is as per their data sheet, 8,388,608-bit/8MBit/1Mbyte].

-from the link below

https://community.st.com/message/149414-re-interfacing-stm32-with-external-512kx16-sram-8bit-data-only-accessible-per-one-address-of-ram?commentID=149414&,et=watches.email.thread ♯ comment-149414

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