STM32F4 can TRG1 be routed to TIM2 and TRG2 be routed to TIM1 so that both operate as master and slave?

[waclawek.jan]

What is TRG1/TRG2?

JW

[BFox.1]

Sorry, was referring to the trigger output of timers 1 and 2, should have been TRGO1 and TRGO2. The question is can a single general purpose timer be configured to be both a slave and master simultaneously.

[Michal Dudka]

Yes, timer can be slave and master simultaneously. Read also carefuly section about "Master/Slave mode" (MSM bit) in reference manual.

[BFox.1]

Michael, will do, thanks for your help.

[Tesla DeLorean]

Should be tables in the Reference Manual (RM0090)

TIM1->TRGO --> TIM2 ITR0

https://www.st.com/resource/en/reference_manual/rm0090-stm32f405415-stm32f407417-stm32f427437-and-stm32f429439-advanced-armbased-32bit-mcus-stmicroelectronics.pdf