stm32f103cbt6 spi enable cause spi in slave mode

[sheng yang]

I made a board with spi1 connect a lora module, and the nss pin, I just want to use soft control. But I found that before I enable spi1, the SPI CR1 and CR2 register value as:

(gdb) x/2wx 0x40013000
0x40013000:     0x00000024      0x00000040

but after I do spi_enable(SPI1), I get these register as below:

(gdb) x/2wx 0x40013000
0x40013000:     0x00000020      0x00000040

This is the releate codes:

	spi_init_master(controller, SPI_CR1_BAUDRATE_FPCLK_DIV_32, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
		SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_MSBFIRST, SPI_NSS_SOFT);
    spi_enable_rx_buffer_not_empty_interrupt(controller);
	spi_enable(controller);


int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha,
		    uint32_t dff, uint32_t lsbfirst, uint32_t nss)
{
	uint32_t reg32 = SPI_CR1(spi);

	/* Reset all bits omitting SPE, CRCEN and CRCNEXT bits. */
	reg32 &= SPI_CR1_SPE | SPI_CR1_CRCEN | SPI_CR1_CRCNEXT;

	reg32 |= SPI_CR1_MSTR;	/* Configure SPI as master. */

	reg32 |= br;		/* Set baud rate bits. */
	reg32 |= cpol;		/* Set CPOL value. */
	reg32 |= cpha;		/* Set CPHA value. */
	reg32 |= dff;		/* Set data format (8 or 16 bits). */
	reg32 |= lsbfirst;	/* Set frame format (LSB- or MSB-first). */
	/* reg32 |= nss & 0XFFFF; */
	SPI_CR1(spi) = reg32;

	if (nss == SPI_NSS_HARD_OUTPUT)
		SPI_CR2(spi) |= SPI_CR2_SSOE; /* common case */
	else
		SPI_CR2(spi) &= ~SPI_CR2_SSOE; /* common case */

	return 0;
}


void spi_enable_rx_buffer_not_empty_interrupt(uint32_t spi)
{
	SPI_CR2(spi) |= SPI_CR2_RXNEIE;
}


void spi_enable(uint32_t spi)
{
	SPI_CR1(spi) |= SPI_CR1_SPE; /* Enable SPI. */
}