STM32F0 Curious ADC behaviour

[srdjan]

Posted on October 11, 2015 at 15:07

This is relation to my previous forum post [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/STM32F030F4%20ADC%20strange%20behaviour&currentviews=31]here:

I tried to simplify the test case as much as possible and here are the results. I'm sampling a single channel PA4 with clock set to ADC_CLOCK_SYNC_PCLK_DIV4 and sample time of ADC_SAMPLETIME_71CYCLES_5 GPIO is set in ''ANALOG'' mode and no pullups. Input signal is a voltage of 0.3V. Here is what I get on the scope when I'm measuring directly on the PA4 pin. (See attached image). It looks like that during the sample stage, the input it pulled up to 0.7V. My input circuit is given also in the attached image. What am I missing here? #adc #stm32f0 #dma

[re.wolff9]

Posted on October 27, 2015 at 12:12

When you define the pin as ''open drain'', the ''pullup mosfet'' will still be there. The hardware just is configured not to turn it on anymore. With the mosfet still there, it has a parasitic diode to VCC that will start to conduct if you do not respect the ''absolute maximum'' voltage of that pin. 

On PIC microcontrollers there is one pin that is truly opendrain. Protection diodes, top mosfet are not installed. Read the datasheet that this pin can go up to 12V or thereabouts, but in the ST datasheet the maximum is lower and related to VCC if the pin is not FT.