The STM32F412 chips have 2 MCO pins:
The MCO2 pin can have 4 different source clocks:
I've noticed that when I change the source from a default one (SYSCLK) to PLLI2S (PLLI2S not enabled) or HSE (not connected), the power consumption is reduced ~0,5mW.
I'm using STM32F412CG chip in UFQFPN48 package. This chip version doesn't even have the MCO2 pin (PC9).
I don't see such behavior for the MCO1 pin.
Have anybody encountered similar behavior? Doesn't it feel like a silicon bug?
GPIOC MODER : 0xfc000000
GPIOC OTYPER : 0x00000000
GPIOC OSPEEDR: 0x00000000
GPIOC PUPDR: 0x00000000
GPIOC AFRL: 0x00000000
GPIOC AFRH: 0x00000000
It's all default values for PC9, since my package doesn't even have the PC9 pin.
