STM32 internal RTC backup registers getting cleared even if there is Vbat connected.

[bipin_g]

Hi All,

I am working on " STM32F103xE" controller. I am using internal RTC for the application. I am using internal RTC's backup register to store some Checksum value that can be used by application. We have connected the Vbat supply also to keep the operation intact.

Suddenly we have observed few of the devices started giving errors as the checksum stored in backup register got cleared automatically.

Upon checking the batter voltage, it is in a good condition and we are not clearing the backup registers from software also(using backup domain reset). We are unable to track what could be the possible reason that can clear the backup registers.

If we again write the checksum in backup register, device start working properly.

Can someone please help to debug this issue. Any help will be appreciated.

TIA.

[Andrew Neil]

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@bipin_g wrote:

Suddenly we have observed few of the devices started giving errors as the checksum stored in backup register got cleared automatically.

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Had those devices performed a restart/reset ?

Does your startup code take care not to clear any existing data and/or checksum(s) ?

[bipin_g]

Had those devices performed a restart/reset ?

-Yes, frequent restart is done on those devices

Problem is we have thousands of such devices running on same code but only few are giving this issue.

[Sarra.S]

Hello @bipin_g, 

Even though you've checked the battery voltage, for me it seems that maybe VBAT dropped below the operating range of the backup domain for those devices.. Try to periodically monitor VBAT voltage, you can use an ADC channel if available to measure the VBAT level

[unsigned_char_array]

You need to enable the backup regulator. At least for the H7 (BREN). I assume this MCU is not much more different, but I could be wrong. See Reference Manual.

Edit:

I found this in the RM of your MCU:

To enable access to the Backup registers and the RTC, proceed as follows:
- enable the power and backup interface clocks by setting the PWREN and BKPEN bits
in the RCC_APB1ENR register
- set the DBP bit the Power Control register (PWR_CR) to enable access to the Backup
registers and RTC.