STM32 clock Jitter on TIM4

[fernando]

Posted on April 02, 2014 at 08:56

Hello everyone, I'm using STM32F100V8 and I configured TIM4 to generate a square wave (for uart sw). The TIM4 is so configured and should have the highest priority: 

  TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);   TIM_TimeBaseStructure.TIM_Period = 1;   TIM_TimeBaseStructure.TIM_Prescaler = 405;  TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;   TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);  TIM_ITConfig(TIM4, TIM_IT_Update , ENABLE);  NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);  NVIC_InitStructure.NVIC_IRQChannel = TIM4_IRQChannel;  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;  NVIC_Init(&NVIC_InitStructure);  Inside the ISR of TIM4 i toggle a MCU line and my scope show me that the clock has a very high jitter; Could someone give me some suggestion to make te clock more stable ? Here attached an image from my scope acquired on a long time with infinite persistence time  #stm32-clock-jitter-tim4

[waclawek.jan]

Posted on April 02, 2014 at 09:47

Don't toggle the output pin ''manually'' in the ISR. Rather, use one of the output compare channels and set it to change state in the ''future'' as needed.

A completely different approach may be to use the timer as trigger for DMA transferring from a prepared array in RAM to GPIO. JW

[fernando]

Posted on April 02, 2014 at 11:37

Thanks for the reply. Could you please explain me why I can't toggle the pin manually inside the ISR ? 

[waclawek.jan]

Posted on April 02, 2014 at 12:00

... to avoid the jitter caused by the zillions of factors causing variable latency of the ISR....

Mind, this is NOT a microcontroller. It's a SoC with relatively loosely (as far as timing goes) coupled modules. JW

[Tesla DeLorean]

Posted on April 02, 2014 at 15:42

Could you please explain me why I can't toggle the pin manually inside the ISR ? 

You can, but it's the stupid plan, the TIM peripheral is capable of toggling pins on a hard time line, or generating pulses, etc directly. If you do it in software you get to see all the latency and variability in the servicing.

[gordon2399]

Posted on May 05, 2014 at 22:28

I have the similar problem.  I am relying on the timer to provide constant timing for ADC sampling.  SPI command is used to read the ADC.  The CS pin negative edge starts the acquisition.  I manually set and reset the CS pin in the interrupt routine, but the CS pin has high jitter.  That adds lots of noise to my FFT plot.  Is there a way to minimize the jitter?  I am using STM32F415

[Tesla DeLorean]

Posted on May 06, 2014 at 02:10

You could presumably drive the CS pin as a TIM PWM signal, you could cause the pin to go low for a prescribed period, one into which you'd then perform your SPI transaction, starting it in the CCx interrupt

[gordon2399]

Posted on May 06, 2014 at 21:20

Sorry, I was not clear in my explanation.  For the ADC that I use, both CS and SCLK must not have jitter.  The ADC actually starts the acquisition at the fourth rising edge of SCLK.  I understand your comment about using the PWM output as the CS signal, but that doesn't solve the jitter problem for SCLK.

[Tesla DeLorean]

Posted on May 06, 2014 at 21:50

Perhaps you can use a TIM triggered DMA into the SPI peripheral?

Other than that you might want to get the hardware sequencing handled in a CPLD?