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SPI behaviour is different running the same software on two Nucleo-G474RE boards

CTapp.1
Associate III

I am using SPI 1 on a pair of Nucleo-G474RE boards that are running the same software image. On of the interfaces is working correctly, the other is not.

A logic analyser shows the following:

Working

CTapp1_1-1696585813134.png

Not working

CTapp1_0-1696585649192.png

From this, it looks as if there is a spurious clock cycle / glitch at the start of the transfer. What could cause this?

6 REPLIES 6
LCE
Principal

Are you sure that the firmware is 100% identical?

And the hardware? External pull-resistors, caps, ... ?

Chip revision?

AScha.3
Chief

>glitch at the start of the transfer. What could cause this?

some capacitive coupling between cs and clk , maybe long wires close together.

a: reduce port speed cs pin , --> slow.

b: reduce coupling or use screened cable (also for your test-wires , use a screened scope tip and test)

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CTapp.1
Associate III

Yes, I have programmed the same image from the same Cube project onto the boards. The boards have nothing else connected to them so that I could eliminate any external influences on the signals.

CTapp.1
Associate III

Both chips are 0x469 Rev X.

LCE
Principal

So the only difference might be the scope wiring? Maybe there's the problem?

Your screenshots look like a PC scope or logic analyzer, do you have a stand alone scope to verify that?

Wildly guessing... 😉

TDK
Guru

Make sure all pins are initialized and the SPI peripheral is enabled prior to CS going low. This can be done by sending an initial dummy transfer with CS high.

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