2020-05-15 12:29 AM
I am developing a device that simultaneously logs two CAN lines using the STM32H743.
I saw "Wrong data may be read from Message RAM by the CPU when using two FDCANs" in STM32H743 Errata document.
I need a detailed explanation of the above Errata.
I am testing by setting FDCAN1 to 500KBPS, FDCAN2 to 250KBPS and FDCAN interrupt priority both to the same priority.
It seems that there is no problem so far when testing by setting as above.
Is there any problem using this?
2020-05-15 05:34 AM
Description
When using two FDCAN controllers, and the CPU and FDCANs simultaneously request read accesses from Message RAM, the CPU read request may return erroneous data. The issue is not present if the CPU requests write access to Message RAM.
Workaround
To avoid concurrent read accesses between the CPU and FDCANs, use only one FDCAN at a time.
What other details do you need, or what do you find insufficient about that explanation/workaround?