2022-01-21 03:07 PM
STM32H743
Does errata 2.16.2 "Wrong data may be read from Message RAM by the CPU
when using two FDCANs" apply to silicon revision V?
The errata indicates it does, but previous discussion by Imen Dahmen indicates the issue was corrected. I need a confirmation before I buy these parts.
Datasheet: https://www.st.com/resource/en/datasheet/stm32h743bi.pdf
Previous discussion: https://community.st.com/s/question/0D53W000007Yka4SAC/is-it-possible-to-use-both-fdcans-in-an-stm32h753-mcu-at-the-same-time
Solved! Go to Solution.
2022-01-22 06:13 AM
In the errata sheet ES0392 V6:
So this FD-CAN limitation is absent from revision V.
2022-01-22 06:13 AM
In the errata sheet ES0392 V6:
So this FD-CAN limitation is absent from revision V.
2022-01-24 02:02 AM
Hello @MBC ,
As mentioned @Nikita91, this limitation "Wrong data may be read from Message RAM by the CPU when using two FDCANs" is not available in the revision V.
Please have a look at the table 3 in the STM32H743xI/G Errata sheet (ES0392 Rev 8) :
status “-�?, means limitation absent.
Imen