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Does STM32H743 Errata 2.16.2 apply to revision V silicon?

MBC
Associate III

STM32H743

Does errata 2.16.2 "Wrong data may be read from Message RAM by the CPU

when using two FDCANs" apply to silicon revision V?

The errata indicates it does, but previous discussion by Imen Dahmen indicates the issue was corrected. I need a confirmation before I buy these parts.

Datasheet: https://www.st.com/resource/en/datasheet/stm32h743bi.pdf

Errata link: https://community.st.com/s/question/0D53W000007Yka4SAC/is-it-possible-to-use-both-fdcans-in-an-stm32h753-mcu-at-the-same-time

Previous discussion: https://community.st.com/s/question/0D53W000007Yka4SAC/is-it-possible-to-use-both-fdcans-in-an-stm32h753-mcu-at-the-same-time

1 ACCEPTED SOLUTION

Accepted Solutions
Nikita91
Lead II

In the errata sheet ES0392 V6:

0693W00000JMx0jQAD.pngSo this FD-CAN limitation is absent from revision V.

View solution in original post

2 REPLIES 2
Nikita91
Lead II

In the errata sheet ES0392 V6:

0693W00000JMx0jQAD.pngSo this FD-CAN limitation is absent from revision V.

Imen.D
ST Employee

Hello @MBC​ ,

As mentioned @Nikita91​, this limitation "Wrong data may be read from Message RAM by the CPU when using two FDCANs"  is not available in the revision V.

Please have a look at the table 3 in the STM32H743xI/G Errata sheet (ES0392 Rev 8) :

status “-�?, means limitation absent.

Imen

When your question is answered, please close this topic by clicking "Accept as Solution".
Thanks
Imen