2023-01-25 05:35 AM
FMC is configured to interface asynchronous sram (IS61WV25616, 10ns). FMC 16-bit databus is multiplexed between sram and LCD controller.
Data transfer happens using DMA. MCU system clock is 80Mhz. Supply voltage is 3.3V
Sram and LCD controller is working ok using FSMC interface. However sharp 11ns wide spikes (or glitches) are seen on the address line, data bus and memory control lines.
Level of spikes are almost one volt upwards from zero-level and same one volt level downwards from one-level. MCU supply voltage and ground seems stable during this event.
Same glitches happens also on address bus and data bus without bus load(LCD flex cable disconnected and sram not assembled).
Seems that FSMC interface has some internal signal collisions or timing problems happening. Is this possible with a wrong bus configuration?
Although memory and LCD display data traffic is working ok we are measuring high radiated emission coming from those spikes.
Examples of glitches on FMC address line A0 is showed in picture (ch1). Glitches on Ch2 is from FMC_NOE signal.
Regards,
Bn
2023-01-25 07:04 AM
Depending on where do you measure this, but, this to me appears to be inadequate ground/return.
> LCD flex cable
This is often cause of troubles, too. Again, ground/return has to be carefully considered.
Nonetheless, start with decreasing the FSMC pins' slew rate (GPIO_OSPEEDR setting).
JW
2023-01-29 06:00 AM
Spikes were measured from SRAM address, data and control pins. LCD flex cable was disconnected. I rechecked that spikes have same width and level without SRAM assembled. In this case there are nothing external loading FSMC bus.
Seems spikes are coming from MCU. I have still to check GPIO_OSPEEDR slew rate setting.
Thanks for your fast answer
Bn
2023-01-30 08:26 AM