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How to syncronize timers?

kyouma001
Associate II

Hi I'm using STM32F407 development board. I want to syncronize TIM2 and TIM5. I've followed these instructions. Here is my TIM2 initialization function below:

void TIM2Config (void) {
	/*************>>>>>>> STEPS FOLLOWED <<<<<<<<************
	1. Enable the TIM2 clock
	2. Set clock division, enable auto-reload preload
	3. 
	********************************************************/
	
	//NVIC_SetPriority (SysTick_IRQn, 1);
	
	//	1. Enable the TIM2 clock
	RCC->APB1ENR 	|=	RCC_APB1ENR_TIM2EN;
	
	//	2. Set clock coeff. as 2, enable auto-reload preload
	TIM2->CR1		= 	TIM_CR1_URS | TIM_CR1_CMS_1 | TIM_CR1_CMS_0 | TIM_CR1_CEN;
	
	TIM2->CR2		=	TIM_CR2_MMS_0;
	TIM2->SMCR		=	TIM_SMCR_MSM;
 
	TIM2->CNT		=	0;
	TIM2->PSC		=	(uint32_t) 1-1;
	TIM2->ARR		= 	(uint32_t) 26000000-1;
	TIM2->CCR1		= 	(uint32_t) 1300000-1;
	TIM2->RCR		= 	(uint32_t) 0;
	
	TIM2->CCMR1		=	TIM_CCMR1_OC1PE | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1;
	TIM2->CCER		=	TIM_CCER_CC1E | TIM_CCER_CC1P;
	
	TIM2->EGR		=	TIM_EGR_UG;
	TIM2->DIER		|= 	TIM_DIER_UIE;
	NVIC_EnableIRQ(TIM2_IRQn);
}

and TIM5 initialization function:

void TIM5Config (void) {
	/*************>>>>>>> STEPS FOLLOWED <<<<<<<<************
	1. Enable the TIM5 clock
	2. Set clock division, enable auto-reload preload
	3. 
	********************************************************/
	
	//NVIC_SetPriority (SysTick_IRQn, 1);
	
	//	1. Enable the TIM5 clock
	RCC->APB1ENR 	|=	RCC_APB1ENR_TIM5EN;
	
	//	2. Set clock coeff. as 2, enable auto-reload preload
	TIM5->CR1		= 	TIM_CR1_URS | TIM_CR1_CMS_1 | TIM_CR1_CMS_0 | TIM_CR1_CEN;
	TIM5->SMCR		=	TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | 0UL << 4 | 0UL << 5| 0UL <<6;
	
	TIM5->CNT		=	0;
	TIM5->PSC		=	(uint32_t) 1-1;
	TIM5->ARR		= 	(uint32_t) 26000000-1;
	TIM5->CCR1		= 	(uint32_t) 1300000-1;
	TIM5->RCR		= 	(uint32_t) 0;
	
	TIM5->CCMR1		=	TIM_CCMR1_OC1PE | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1;
	TIM5->CCER		=	TIM_CCER_CC1E | TIM_CCER_CC1P;
	
	//TIM5->EGR		=	TIM_EGR_UG;
	TIM5->DIER		|= 	TIM_DIER_UIE;
	NVIC_EnableIRQ(TIM5_IRQn);
}

It seems like they are working independently. How can check if the timers syncronized? Thanks in advance.

1 ACCEPTED SOLUTION

Accepted Solutions

If you set Trigger mode of Slave-mode controller, upon trigger it will set TIMx_CR1.CEN. If you set TIMx_CR1.CEN manually before the trigger, timer starts to run and ignores the trigger.

So you need to set up slave timer first, without setting TIMx_CR1.CEN, and only after that start master timer which outputs the trigger.

You can check synchronicity by outputting PWM from both timers and observing on LA/oscilloscope.

Note, that there will be some small delay between master and slave, as it takes a couple of cycles for the trigger to propagate from master to slave. I'm not sure the MSM bit is as effective as promised, but it would work only if you'd trigger the master externally, anyway. You can compensate for the delay by setting slave's CNT to small nonzero value determined experimentally.

JW

View solution in original post

2 REPLIES 2
Sarra.S
ST Employee

Hello @Anıl Berk​,

As it is stated in the AN4013, paragraph 3.3; there is an example provided in the STM32Cube package in Examples\TIM\TIM_CascadeSynchro,\TIM_ExtTriggerSynchro\TIM_Synchronization

and \TIM_ParallelSynchro folders.

You can refer to these two examples to get inspired!

Hope that helps!

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

If you set Trigger mode of Slave-mode controller, upon trigger it will set TIMx_CR1.CEN. If you set TIMx_CR1.CEN manually before the trigger, timer starts to run and ignores the trigger.

So you need to set up slave timer first, without setting TIMx_CR1.CEN, and only after that start master timer which outputs the trigger.

You can check synchronicity by outputting PWM from both timers and observing on LA/oscilloscope.

Note, that there will be some small delay between master and slave, as it takes a couple of cycles for the trigger to propagate from master to slave. I'm not sure the MSM bit is as effective as promised, but it would work only if you'd trigger the master externally, anyway. You can compensate for the delay by setting slave's CNT to small nonzero value determined experimentally.

JW