2021-09-18 10:38 AM
Current structure is:
typedef struct __DMA_HandleTypeDef
{
...
HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
...
} DMA_HandleTypeDef;
Interrupts can change the State value, but it's not volatile, so the compiler is unaware.
Polling the handler state until it changes to HAL_DMA_STATE_READY will fail when optimizations are enabled.
This works perfectly:
typedef struct __DMA_HandleTypeDef
{
...
__IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
...
} DMA_HandleTypeDef;
2021-09-18 11:22 AM
Yes, it should. What chip?
It's defined as volatile for the H7 series:
2021-09-18 12:50 PM
32F103C8, using FW F1 v1.8.4 library.
Definitely not in the F1 library, issued a pull request:
2021-09-20 04:11 PM
For this purpose the user is supposed to call the HAL_DMA_GetState() function, which will not have the optimization problem.
Also the Lock member of the structure must be volatile for the compiler to not mess up the access order for these variables.
And they are changing the variables ErrorCode and State after the __HAL_UNLOCK(), which creates a race condition:
Not counting the ones in HAL_DMA_Init(), which are most likely "by design", they to this after the lines: 656, 752, 839, 877, 949, 1177, 1328, 1373, 1405, 1513, 1541.