RXNEIE needed for dma request?

[ProxiVision]

Hello,

i am trying to interface TI's ADS8910 (18bit SAR ADC) to an STM32F730 via normal SPI, since i am unsure whether QSPI will work.

I want to achieve the full 18 bit @1MSa, which is possible when working with 54MHz (/2 APB2 prescaler on the F730 which runs at full speed - 216MHz) and the ADC's zone 2 transfer.

The HAL implementation of dma transfer is way to slow between consecutive readouts and thus gets stuck "busy" and "locked" forever after the first readout.

Therefore i am currently trying to write everything myself.

My question is regarding the SPI CR2 register, bits 6 & 7 (RXNEIE and TXEIE):

Will the DMA requests, mentioned in Bits 0 & 1 (RXDMAEN and TXDMAEN) still be generated when the interrupts are masked?

I don't want my program to be interrupted more than neccessary.

the flow should be :

F7 gets an interrupt that signals that the ADC has finished conversion and is ready to send the new data.

SPI transfers 3x 8bits // or 2x 11bits (the ads 8910 needs at least 22 clocks)

DMA request is generated

DMA finishes transfer an generates an interrupt

Code handles data and SPI/DMA flags and enables/disables

Thanks in advance!

Michael

[TDK · Accepted solution]

> Will the DMA requests, mentioned in Bits 0 & 1 (RXDMAEN and TXDMAEN) still be generated when the interrupts are masked?

Yes, DMA requests are handled regardless of interrupt configuration.

Consider capturing more than 1 sample per DMA buffer. The power of DMA is to capture many samples into a buffer and process them as a batch. This is more efficient than interrupting on every sample.

[ProxiVision]

thanks for the quick answer!

I would like to, but i am unsure i can do it for the SPI to Memory part, the SPI on the F730 has only 1x 32bit FIFO each (one for RX and one for TX) and i need to clock and receive 22bits per sample. So i can't even buffer 2 Measurements in the FIFO.

[LCE]

I think TDK is not talking about the peripheral's FIFO, that's just an additional buffer between the SPI peripheral and the rest of the system.

So when starting DMA, assign it a memory buffer being able to hold more than one sample, change transfer length accordingly.

For my audio stuff using the I2S ( = SPI) I usually use DMA buffers big enough to give the MCU enough time for "working" with the data inbetween. Mostly several 100s of samples, but I don't do any real-time processing.

[ProxiVision]

Thanks, i should definitely test that.

So far I've only been thinking about how i can process each sample before the next arrives, so that handling the raw data works in "real-time" and once i've stored a few hundred processed samples, i'd transfer them over to USB.

How do you deal with timed readouts in your applications? Do you leave dma enabled and only disable and re-enable SPI?

Or would it work to simply reload the NDTR only upon the interrupt? (with the dummy data, so that the Master starts clocking)

I have to read out every 1µs, which is signaled by an interrupt from the ADC.

I doubt I'd be fast enough for switching the stuff off and on if i'd work with the circular mode.

[LCE]

Isn't there any other way than to wait for this interrupt?

I actually don't know the SPI peripheral that well, so I can't tell if that ADC signal can somehow be "integrated" into the data transfer. 

Maybe check the ADC datasheet again.

I usually use audio ADCs, clocked by the SAI or I2S (part of SPI) peripheral, so with the word clock (from stereo times often "LRCK") samples are read via the serial / bit clock, no need to wait for an interrupt.

For these transfers, DMA in circular mode is perfect, at high data rates with:

a) buffers big enough

b) working with DMA's half and complete interrupts (set flags to work on first or second half of the buffer)

c) and the best feature - if the STM32 type supports it (the F7 does so) - double buffer mode "DBM"

DBM was not yet supported by HAL when I started playing with that about 2 or 3 years ago.