2014-07-24 02:18 AM
I am working on a project that requires at least 500 kB of memory to be used. I have an SDK with this code defining the stack and the heap and it works fine.
Stack_Size EQU 0x00004000 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00200000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit
However, I am trying to integrate a camera and LCD screen feature into this SDK, and when I do that, the highest values that will at least bring up the LCD screen are shown below.
Stack_Size EQU 0x00004000 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00002B50 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit
I need the sizes of the stack and heap in the second code sample to match the sizes in the first code sample so that I do not get stuck in a hard fault exception loop due to no memory being available. Why does increasing the heap size make my project worse?
I have attached a screenshot of my project options so you can see the configuration of the RAM. Also I am working with an stm32 eval2 board, keil v5, and c++ #c++ #stm32eval #keil #external-ram2014-07-24 06:48 AM
You left out the details on how you attached the external RAM for the heap. Assuming the IC is large enough to accommodate the 2MByte heap allocation you need to ensure the heap area maps to the external address (and here I assume FSMC and a 16Mbit SRAM) for the base of the external memory. Remember when using FSMC the RAM won't be visible until you configure the FSMC bus.
Most likely you get memory faults because you are not aligning the heap section to the FSMC base address, or the FSMC is configured incorrectly for the IC capacity and bus width. If you are working with an STM32F42x then replace FSMC/SRAM with the external DRAM and controller. Jack Peacock