PVD IT always rising

[Ppeyr.1]

I'm working on a STM32L072, and I tried to configure the PVD to rising an IT when the supply voltage is below 2.7V.

It appears that the IT is always rise even the voltage is always above 3V.

    __HAL_RCC_PWR_CLK_ENABLE();
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
 
    /* Enable the Ultra Low Power mode */
    SET_BIT(PWR->CR, PWR_CR_ULP);
 
    /* Enable the fast wake up */
    SET_BIT(PWR->CR, PWR_CR_FWU);
 
    PWR_PVDTypeDef pvdConf;
    pvdConf.PVDLevel = PWR_PVDLEVEL_4; /* level: 2.7V */
    pvdConf.Mode = PWR_PVD_MODE_IT_RISING;
    HAL_PWR_ConfigPVD(&pvdConf);
    HAL_PWR_EnablePVD();

I tried with and without the ULP and FWU. If I set the PVDLevel to PWR_PVDLEVEL_0, the IT are not rise anymore.

What is missing ?

[waclawek.jan]

> It appears that the IT is always rise even the voltage is always above 3V.

Is the VDD voltage already above 3V when you enable it?

Read out and check/post the relevant PWR and EXTI regiiters content.

What hardware are you using? Can you try this on a "known good" board such as Nucleo, to exclude hardware issues?

> If I set the PVDLevel to PWR_PVDLEVEL_0, the IT are not rise anymore.

That strange, isn't it? Shouldn't that correspond to 1.9V? Do PWR_PVDLEVEL_x symbols what you expect, i.e. do they correspond to the values for PWR_CR.PLS as given in RM?

Maybe you should try to do this without Cube/HAL to exclude possible bugs there.

JW

[Ppeyr.1]

Thanks for the answers.

> Is the VDD voltage already above 3V when you enable it?

  Yes, I put a scope on the supply voltage, and it never goes below 3V

> Read out and check/post the relevant PWR and EXTI regiiters content.

  I printed the EXTI register, and only one bit is set to 1 => PVD flag

> What hardware are you using? Can you try this on a "known good" board such as Nucleo, to exclude hardware issues?

  I'm working on my own board, I don't exclude an issue on the board, but I saw nothing on the scope

I use a 3.3V LDO, so I have 3.3V. I want to set the threshold to 2.7V so, PWR_PVDLEVEL_4 is OK, I put PWR_PVDLEVEL_0 just to test if the IT are always raised, in that case is not. Is it possible that the PVD doesn't measure correctly the voltage ?

[waclawek.jan]

And what is PWR_CR register content ?

JW

[Ppeyr.1]

Sorry for the delay, after check, the VrefInt is not stable.

Could it be this ?

I check, after going to sleep mode (not stop mode) the VreftInt is not stable after wake-up also.