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Program flow for synchronous data acquisition from SDADC and ADC using DMA

Associate II
Posted on March 29, 2016 at 06:11


I was wondering if someone could give me advice about my program flow for reading SDADCs and ADCs simultaneously. I'm not sure posting my code here would help so much as I'm not facing a bug exactly but rather stuck on how to proceed type.

Essentially I have a PCB with an STM32F373CC, with 8 signal conditioned channels connected to SDADCs. 

5 Channels connected to SDADC1 and 3 to SDADC3. 

SDADC3 is triggered with Injected Synchro conversion with SDADC1

Where SDADC1 is triggered with Timer T3_CC1 which is set to my sampling frequency which is usually somewhere between 500Hz to 1000Hz. 

I intend to do some signal processing soon, so I'd like to avoid using the processor as much as possible. Right now, I'm using DMA2_CH3 to get SDADC_JDATA13R register and write the data by ping pong buffering. Of course, this passing of buffers happens in the DMA interrupt triggered on HT and TC flags.

My main program is just a loop that checks when one of the buffers is filled and then packages that data into an ethernet packet and transmits it. 

On my PCB are also two other signal inputs coming into ADC PA2 and PA6. I'd like to capture them with the same sampling rate as that of SDADCs. So I'm trying to trigger it by T3_TRGO and do the data transfer by DMA1_CH1, intending ping ponging here too.

What I'm not sure about is, I don't think the DMAs can be triggered together or linked somehow. So maybe I need to check the buffers for both SDADC and ADC, and package the data and transmit when data from both is available. I'm afraid that maybe it takes too much time that might cause some issues. e.g. if I check SDADC and ADC buffer conditions individually, it might take so long processing a peripheral that the other buffer gets overwritten by the time its turn comes. If instead I wait for both conditions to become true, that might delay the overall processing. 

I'm wondering if there is a better way to do it.


#stm32f373 #dma #adc #sdadc
Associate II
Posted on March 29, 2016 at 12:06

Since you control the triggering of the ADCs and SDADCs with timers, they will deliver data at exactly the same speed relative to each other. So the DMAs will be effectively linked.

Eg. if you have the same sample frequency with 8 results from SDADC for every 2 results from ADC, just make your SDADC buffers 4 times the size of the ADC buffers. You will still need to check for the completion of both buffers, probably, but one buffer will not be able to run ahead of the other buffer and overflow, as long as you set the correct timing and buffer sizes.

But if you are worried (or cannot get that to work), you can always just simply copy the data out of the cyclic dma buffers as soon as it is ready, into some temporary signal processing buffers. Then you can interleave the data from ADCs and SDADCs in the temporary buffer as needed (eg. tagging it with a type id or something), and you can process it with the appropriate speed.