Problem with RTC backup registers

[Mprd.1]

Hi,

I’m trying to use RTC backup registers in STM32G070KBT6. I wrote this code but I only receive FFFFFFFF at serial output. How Can I fix this problem?

Thanks.

RTC_HandleTypeDef hrtc;

void setup() {

 HAL_RTC_Init(&hrtc);

 Serial.begin(9600);

 Serial.println("Initializing ... ");

 //HAL_RTCEx_DeactivateTamper(&hrtc, RTC_TAMPER_1);

 __HAL_RTC_TAMPER_CLEAR_FLAG(&hrtc, RTC_FLAG_TAMP1);

 HAL_RTCEx_BKUPWrite(&hrtc, RTC_BKP_DR0, 0xEEAABB00);

 Serial.println("Reading Backup Registers ... ");

 Serial.println(HAL_RTCEx_BKUPRead(&hrtc, RTC_BKP_DR0),HEX);

}

void loop() {

}

[waclawek.jan]

Did you enable backup domain access by setting PWR_CR1.DBP? Note that you must have PWR clock running in RCC to be able to do that.

The RM is not clear whether you need to have a valid clock for RTC selected, running and enabled in RCC_BDCR, and whether RCC_APBENR1.RTCAPBEN has to be enabled, too, to be able to access the backup registers.

JW

[Mprd.1]

Thanks JW.

I don't know how to do it. I read these instructions in stm32g0xx_hal_rtc_ex.c file and it seems simple:

  *** Backup Data Registers configuration ***

  ===========================================

  [..]

    (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite()

        function.

    (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead()

        function.

    (+) Befoer callingthose fucntion you have to call HAL_RTC_Init() in order to

        perform TAMP base address offset calculation.

I also read RTC_Tamper example in NUCLEO-G070RB but I didn't notice that I have to enable PWR_CR1.DBP.

Would you explain what should I do exactly?

[waclawek.jan]

Problem with the "examples" in Cube is, that they are useless as examples. Reason is, that Cube is primarily a "library" to support clicking in CubeMX, which produces a tangled mess, without clean explanation of the inter-dependencies. And ST stubbornly refuses to produce useful examples.

> I also read RTC_Tamper example in NUCLEO-G070RB but I didn't notice that I have to enable PWR_CR1.DBP.

readme.txt of that example says:

The RTC peripheral configuration is ensured by the HAL_RTC_Init() function. This later is calling the HAL_RTC_MspInit()function which core is implementing the configuration of the needed RTC resources according to the used hardware (CLOCK, PWR, RTC clock source and BackUp).

And, sure enough, in HAL_RTC_MspInit() you can find both call to HAL_PWR_EnableBkUpAccess() - look up what does it do - and setup of RTC clock and setting of RTCAPBEN in the characteristical Cube/HAL gobbledygook (with PWR clock in RCC being enabled both in HAL_RTC_MspInit() and also previously in HAL_MspInit() ).

Now, IMO, HAL_RTC_MspInit() should disable backup domain access as soon as it accomplished whatever it intended to do in backup domain, as that bit is there exactly in order to prevent inadvertent writes to the backup domain; and then later, the example writing to the backup registers should enable it again. That's of course matter of style thus matter of argument and personal preferences, but IMO examples should be as concise as possible.

JW

[waclawek.jan]

On an STM32G0B1 (in the form of Nucleo-G0B1RE) all it took was:

  RCC->APBENR1 |= 0
    | RCC_APBENR1_PWREN
    | RCC_APBENR1_RTCAPBEN
  ;
 
  PWR->CR1 |= PWR_CR1_DBP;
  TAMP->BKP0R = 0x12345678;

resulting in

(gdb) p /x *TAMP
$9 = {CR1 = 0xffff0000, CR2 = 0x0, RESERVED0 = 0x0, FLTCR = 0x0, RESERVED1 = {
    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, IER = 0x0, SR = 0x0, MISR = 0x0,
  RESERVED2 = 0x0, SCR = 0x0, RESERVED3 = {0x0 <repeats 48 times>},
  BKP0R = 0x12345678, BKP1R = 0x0, BKP2R = 0x0, BKP3R = 0x0, BKP4R = 0x0}

i.e. there's no need to enable RTC clock in RCC_BDCR.

JW

PS. Thanks to Tarek Bouchkati @tarekbouchkati tarekbouchkati​  for excellent and prompt support with the 'G0B1 in OpenOCD.