cancel
Showing results for 
Search instead for 
Did you mean: 

NVIC TIM / I2C DMA Priority issue

vbesson
Associate III

Hello Community, 

I am using a STM32F411, 

2 timer with global interrupt and preemption priority of 0 are executing a timing critical process to bitbang a GPIO port.

4uS timer period

And 

a I2C DMA process to update a SSD1306 screen I2C and DMA interrupt have a preemption priority of 14

I am having an issue with the timer bitbang when I sent a message to update the screen. 

I thought that lower interrupt priority with take the lead and it seems that it is not the case

Do I miss something ?

Vincent

 

 

 

1 REPLY 1

Make sure the problem is indeed caused by the priorities, e.g. by toggling pins in the ISRs and checking on oscilloscope for overlap (or lack thereof).

If you've confirmed it, read out and check/post content of NVIC registers (namely NVIC_IPR[]), and SCB_AIRCR to check the PRIGROUP field.

JW