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Nucleo F103RB - Strange Flash Size

sauer
Associate II
Posted on October 14, 2014 at 10:05

Hi,

i bought some Nucleo F103RB Boards and designed a circuit board for the Nucleo to drive my LEDs throught Bluetooth.

The prototype with airwires worked perfectly, but know i tried it with my circuit and if i plug the Nucleo on my circuit i got strange behaviour in flash sizes.

If i try to flash an image it cannot verify.

st-link showed my everytime i run it a different flash size, the sram and page size kept.

Here is a sample output:

2014-10-14T10:04:07 INFO src/stlink-common.c: Device connected is: F1 Medium-density device, id 0x20036410

2014-10-14T10:04:07 INFO src/stlink-common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x20000 bytes (128 KiB) in pages of 1024 bytes

2014-10-14T10:04:07 INFO gdbserver/gdb-server.c: Chip ID is 00000410, Core ID is  1ba01477.

2014-10-14T10:04:07 INFO gdbserver/gdb-server.c: Target voltage is 3269 mV.

2014-10-14T10:04:10 INFO src/stlink-common.c: Device connected is: F1 Medium-density device, id 0x20036410

2014-10-14T10:04:10 INFO src/stlink-common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x3fffc00 bytes (65535 KiB) in pages of 1024 bytes

2014-10-14T10:04:10 INFO gdbserver/gdb-server.c: Chip ID is 00000410, Core ID is  1ba01477.

2014-10-14T10:04:10 INFO gdbserver/gdb-server.c: Target voltage is 3264 mV.

2014-10-14T10:04:44 INFO src/stlink-common.c: Device connected is: F1 Medium-density device, id 0x20036410

2014-10-14T10:04:44 INFO src/stlink-common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x2020000 bytes (32896 KiB) in pages of 1024 bytes

2014-10-14T10:04:44 INFO gdbserver/gdb-server.c: Chip ID is 00000410, Core ID is  1ba01477.

2014-10-14T10:04:44 INFO gdbserver/gdb-server.c: Target voltage is 3271 mV.

Anyone got the same strange behaviour of this? I dont know where it belongs to.

Greetings Michael

#nucleo-f103
10 REPLIES 10
stm322399
Senior
Posted on October 14, 2014 at 11:07

Congrats for using the excellent st-link software from texane.

Run with -v90 switch to see more debug logs.

By the way I did not clearly understood what is 'your' circuit, and how is the Nucleo connected to it, could you clarify ?

sauer
Associate II
Posted on October 14, 2014 at 11:15

Hi.

I etched a circuit board for the nucleo board to stick the nucleo on my board. 

But i cannot figure out why the size is jumping around all the time. If it is at correct size of 128kb i can flash with correct verification so i think thats nothing is blown out. I try the verbose flag as soon im back home.

michaelsauer9
Associate II
Posted on October 14, 2014 at 18:52

Thats my board where i put the Nucleo on -> 

http://imgur.com/VFVj0tZ

And i tried it out with the verbose flag of the st-link util but it doesnt show more usefull information than without verbosing.

So thats the new output with verbose flag:

2014-10-14T18:44:55 DEBUG src/stlink-common.c: stlink current mode: debug (jtag or swd)

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: stlink current mode: debug (jtag or swd)

 

2014-10-14T18:44:55 INFO src/stlink-common.c: Loading device parameters....

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: *** stlink_core_id ***

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: core_id = 0x1ba01477

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: *** stlink_read_debug32 20036410 is 0xe0042000

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: *** stlink_read_debug32 ffff0080 is 0x1ffff7e0

 

2014-10-14T18:44:55 INFO src/stlink-common.c: Device connected is: F1 Medium-density device, id 0x20036410

 

2014-10-14T18:44:55 INFO src/stlink-common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x20000 bytes (128 KiB) in pages of 1024 bytes

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: *** looking up stlink version

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: st vid         = 0x0483 (expect 0x0483)

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: stlink pid     = 0x374b

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: stlink version = 0x2

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: jtag version   = 0x13

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: swim version   = 0x3

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: *** stlink_reset ***

 

2014-10-14T18:44:55 INFO gdbserver/gdb-server.c: Chip ID is 00000410, Core ID is  1ba01477.

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: *** reading target voltage

 

2014-10-14T18:44:55 DEBUG src/stlink-common.c: target voltage = 3271mV

 

2014-10-14T18:44:55 INFO gdbserver/gdb-server.c: Target voltage is 3271 mV.

 

2014-10-14T18:44:55 INFO gdbserver/gdb-server.c: Listening at *:4242...

 

^C2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_run ***

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_exit_debug_mode ***

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_write_debug32 a05f0000 to 0xe000edf0

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_close ***

2014-10-14T18:44:56 DEBUG src/stlink-common.c: stlink current mode: debug (jtag or swd)

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: stlink current mode: debug (jtag or swd)

 

2014-10-14T18:44:56 INFO src/stlink-common.c: Loading device parameters....

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_core_id ***

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: core_id = 0x1ba01477

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_read_debug32 20036410 is 0xe0042000

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_read_debug32 ffffffff is 0x1ffff7e0

 

2014-10-14T18:44:56 INFO src/stlink-common.c: Device connected is: F1 Medium-density device, id 0x20036410

 

2014-10-14T18:44:56 INFO src/stlink-common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x3fffc00 bytes (65535 KiB) in pages of 1024 bytes

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** looking up stlink version

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: st vid         = 0x0483 (expect 0x0483)

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: stlink pid     = 0x374b

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: stlink version = 0x2

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: jtag version   = 0x13

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: swim version   = 0x3

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** stlink_reset ***

 

2014-10-14T18:44:56 INFO gdbserver/gdb-server.c: Chip ID is 00000410, Core ID is  1ba01477.

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: *** reading target voltage

 

2014-10-14T18:44:56 DEBUG src/stlink-common.c: target voltage = 3263mV

 

2014-10-14T18:44:56 INFO gdbserver/gdb-server.c: Target voltage is 3263 mV.

 

2014-10-14T18:44:56 INFO gdbserver/gdb-server.c: Listening at *:4242...

 

^C2014-10-14T18:44:57 DEBUG src/stlink-common.c: *** stlink_run ***

 

2014-10-14T18:44:57 DEBUG src/stlink-common.c: *** stlink_exit_debug_mode ***

 

2014-10-14T18:44:57 DEBUG src/stlink-common.c: *** stlink_write_debug32 a05f0000 to 0xe000edf0

 

2014-10-14T18:44:57 DEBUG src/stlink-common.c: *** stlink_close ***

2014-10-14T18:45:34 DEBUG src/stlink-common.c: stlink current mode: debug (jtag or swd)

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: stlink current mode: debug (jtag or swd)

 

2014-10-14T18:45:34 INFO src/stlink-common.c: Loading device parameters....

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: *** stlink_core_id ***

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: core_id = 0x1ba01477

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: *** stlink_read_debug32 20036410 is 0xe0042000

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: *** stlink_read_debug32 ffff8080 is 0x1ffff7e0

 

2014-10-14T18:45:34 INFO src/stlink-common.c: Device connected is: F1 Medium-density device, id 0x20036410

 

2014-10-14T18:45:34 INFO src/stlink-common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x2020000 bytes (32896 KiB) in pages of 1024 bytes

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: *** looking up stlink version

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: st vid         = 0x0483 (expect 0x0483)

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: stlink pid     = 0x374b

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: stlink version = 0x2

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: jtag version   = 0x13

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: swim version   = 0x3

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: *** stlink_reset ***

 

2014-10-14T18:45:34 INFO gdbserver/gdb-server.c: Chip ID is 00000410, Core ID is  1ba01477.

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: *** reading target voltage

 

2014-10-14T18:45:34 DEBUG src/stlink-common.c: target voltage = 3264mV

 

2014-10-14T18:45:34 INFO gdbserver/gdb-server.c: Target voltage is 3264 mV.

 

2014-10-14T18:45:34 INFO gdbserver/gdb-server.c: Listening at *:4242...

 

But that dont tell me why the flash size jumps all around....?

stm322399
Senior
Posted on October 14, 2014 at 19:20

Great.

Everything lies in the value read from register at 0x1ffff7e0, which is a 16-bit ''Flash size register'' according the RM.

I this log it returned with 3 different values 0x80, 0xFFFF and 0x8080, among which the first one is the real one.

I can't tell why this happen, but if I were you, I will try to connect to my board using windows base STLINK utility from ST, to check the stability of accessing the MCU through SWD.

Is this possible that this happen because of a hardware conflict ? Does the Nucleo alone work normally ?

sauer
Associate II
Posted on October 14, 2014 at 20:01

At first on the breadboard prototype the Nucleo board worked perfectly but on the etched one the problems begun. After the second or third time i tried to flash the Nucleo board ontop of my etched board, the flashing starts to fail.

Now the strange flash size jumpings are there without my board also. 

The funny thing is that i sometimes when the flash size is randomly correct the flashing works. Also the verification is running correctly.

Nickname306_O
Senior
Posted on October 15, 2014 at 16:56

Hi sauer.michael.002,

Do you have the

same

behavior

with ST-Link Utility

?

You can use the latest version of ST-LINK Utility available in the following link :

http://www.st.com/web/en/catalog/tools/PF258168

Best Regards,

Nouha
Posted on October 15, 2014 at 17:02

Third party tools, probably broken. Contact the author of tools for support.

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sauer
Associate II
Posted on October 16, 2014 at 19:59

Hi,

i tried it now on a windows machine and what should i say... it works as expected. the only thing is that the core hangs in the while after setting pll as clock source.. could it be a problem with my external crystal?

Greetings Michael
Posted on October 16, 2014 at 21:38

JTAG/SWD generally requires a period of time for the debugger to break in and stop execution as it gains control. If you do things with the core that can potentially break access (WFI, DMA, Low Power, Clocks, Pins etc) early in the boot this will hamper the debugger, sometimes fatally. Resetting with BOOT0 High can remedy issues with user code.

Issues with PLLs and Clocks, double check suitable flash wait states prior to transitioning to faster sources.

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Up vote any posts that you find helpful, it shows what's working..