Need informations about how fast DMA2 memory to memory transfer can be.

[NBogd.1]

Hello.

The microcontroler used is the STM32F429.

There is an 65MHz capable ADC connected to GPIOA pins 0 to 11.

Also there is a SDRAM IS42S16400J connected on FMC, that is configured like this :

/* FMC Configuration ---------------------------------------------------------*/

/* FMC SDRAM Bank configuration */  

 /* Timing configuration for 90 Mhz of SD clock frequency (180Mhz/2) */

 /* TMRD: 2 Clock cycles */

 FMC_SDRAMTimingInitStructure.FMC_LoadToActiveDelay   = 2;     

 /* TXSR: min=70ns (7x11.11ns) */

 FMC_SDRAMTimingInitStructure.FMC_ExitSelfRefreshDelay = 7;

 /* TRAS: min=42ns (4x11.11ns) max=120k (ns) */

 FMC_SDRAMTimingInitStructure.FMC_SelfRefreshTime     = 4;

 /* TRC: min=70 (7x11.11ns) */       

 FMC_SDRAMTimingInitStructure.FMC_RowCycleDelay       = 7;        

 /* TWR: min=1+ 7ns (1+1x11.11ns) */

 FMC_SDRAMTimingInitStructure.FMC_WriteRecoveryTime   = 2;     

 /* TRP: 20ns => 2x11.11ns */

 FMC_SDRAMTimingInitStructure.FMC_RPDelay             = 2;               

 /* TRCD: 20ns => 2x11.11ns */

 FMC_SDRAMTimingInitStructure.FMC_RCDDelay            = 2;

/* FMC SDRAM control configuration */

 FMC_SDRAMInitStructure.FMC_Bank = FMC_Bank2_SDRAM;

 /* Row addressing: [7:0] */

 FMC_SDRAMInitStructure.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_8b;

 /* Column addressing: [11:0] */

 FMC_SDRAMInitStructure.FMC_RowBitsNumber = FMC_RowBits_Number_12b;

 FMC_SDRAMInitStructure.FMC_SDMemoryDataWidth = SDRAM_MEMORY_WIDTH;

 FMC_SDRAMInitStructure.FMC_InternalBankNumber = FMC_InternalBank_Number_4;

 FMC_SDRAMInitStructure.FMC_CASLatency = SDRAM_CAS_LATENCY;

 FMC_SDRAMInitStructure.FMC_WriteProtection = FMC_Write_Protection_Disable;

 FMC_SDRAMInitStructure.FMC_SDClockPeriod = SDCLOCK_PERIOD; 

 FMC_SDRAMInitStructure.FMC_ReadBurst = SDRAM_READBURST;

 FMC_SDRAMInitStructure.FMC_ReadPipeDelay = FMC_ReadPipe_Delay_1;

 FMC_SDRAMInitStructure.FMC_SDRAMTimingStruct = &FMC_SDRAMTimingInitStructure;

With the refresh rate, configured as per Mr.Clive example:

 // Refresh rate for IS42S16400J-7TL

// 64 ms / 4096 * 90 MHz - 20  -> 15.625 (us) * 90 (MHz) = 1406.25

 FMC_SetRefreshCount(1386);            

I need to know how fast will be memory to memory transfer using DMA2?

I will use an externall clock for the ADC, and also to trigger the DMA transfer.

What is the highest clock I can use to get the fastest transfer?

Can I change the speed of the memory?

I can somehow speed-up the DMA???

What optimizations to make to enhance the transfer speed?

I need to transfer 80000 12bit data as fast as possible to SDRAM.

I will read the entire 16bit from the base memory of GPIOA.

The unused bits will be discarted later.

I need to achive fastest transfer rate using this microcontroller.

Going FPGA way isn't funny.

Thank you!

[waclawek.jan]

Read the DMA appnote,

https://www.st.com/resource/en/application_note/dm00046011.pdf . I'd say 6-10 cycles per transaction, i.e. 20-something MHz. The GPIO side/reads may be irregular, is it OK?

The SDRAM-side may be funny too, especially handling of the refreshes (avoiding them during read bursts).

You may also want to have a look at DCMI.

JW

[Tesla DeLorean]

Shouldn't be hard to actually measure it and know for a specific hardware configuration.​

Will not use cache, perhaps Burst/FIFO to find efficiencies​

[NBogd.1]

Thank you for your answers!

I have thought that I can use the DCMI -> DMA -> FMC, to get the data from the ADC and storeit in the SDRAM.

I have seen in the AN5020 Application not I have seen that the DCMI can transfer at 54MHz

The AD9226 has a clock input line and the data can be sampled, after a given clock, with a latency of 3.5ns to 7ns from the D0..D11 pins.

Please tell me if I can connect a 50MHz clock to the ADC CLK input, and also to the input GPIO that triggers the DMA, it will

work? The DMA will have a latency of at least 3.5ns until it will start to copy data?

Thank you!

[waclawek.jan]

DCMI does have a clock input, and the datasheet has timing data/diagrams for DCMI.

JW

[NBogd.1]

Ok. But what I will do with VSYNC and HSYNC, DCMI lines?

I must to extra hardware to control that lines, or I can just not use them?

What is the solution to connect the 12bit adc, to the DCMI?

It's the 54MHz transfer rate aceivable? The SDRAM goes at 90MHz. I will get the 50Msps sample rate?

I need to know if this will work?

Thank you for your time to answer my questions!

[waclawek.jan]

I don't think anybody will readily answer you these questions. You'll have to prototype and benchmark.

JW

[NBogd.1]

I guess that I don't ask the right questions.

I will ask again.

1.) I need to know if it is possible to use the DCMI to get the data from a 12bit paralel bus ADC (I know that DCMI has 8,12,14 bit capability) ?

2.) I can use DCMI in continuous aquisition mode without the VSYNC, HSYNC lines?

At last, please answer this questions.

Thank you!

[waclawek.jan]

I don't use DCMI in its normal setting, yet alone without the syncs. What does the DCMI chapter in RM say?

As far as ADC goes - the DCMI won't care about what was the source of data, all it cares about is whether their timing respective to clock is OK (see datasheets of both STM32 and ADC, and mind the high-frequency nature of the signals).

JW