2022-08-17 08:28 AM
I'm trying to configure ADC for stm32 NUCLEO-U575-ZI-Q and while generating the code using LL drivers noticed the start-up time for ADC voltage regulator and need to know what actually is 100000, 2 and 10 . Same screenshot is attached with it. Thanks in advance.
2022-08-17 08:34 AM
It's a sloppy delay loop, it doesn't use volatile either, so apt to be removed by the optimizer completely.
Perhaps just delay in micro-seconds what the constant defines as being needed.
Perhaps use a free-running TIM at 1 or 10 MHz...
2022-08-18 01:50 AM
Hello,
Entered a ticket for the missing "volatile"...
ticket 133282.
2022-08-18 03:17 AM
Sorry @Community member and @Mike_ST , I didn't your response. Did you mean that the while loop and calculation that I'm using is not related to ADC Voltage Regulator?
If not what and how to know the start-up time that Voltage Regulator requires?
uint32_t wait_loop_index;
wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US *
(ADC_SYSTEM_CORE_CLOCK / (100000 * 2))) / 10);
while(wait_loop_index != 0)
{
wait_loop_index--;
}
2022-08-18 06:18 AM
The LL_ADC_DELAY_INTERNAL_REGUL_STAB_US contains the stabilization delay in micro-seconds, likely from something like the Data Sheet or Reference Manual, if you think the define is wrong, and want to understand the source.
The more normative solution to sub-ms delays would be to free-run a maximal timer, at 1 or 10 MHz (depending on the level of granularity you want to resolve time). Maximal meaning running the full 16 ot 32-bit period of the TIMx peripheral, with a prescaler to hit the count frequency, such that you can read the CNT (count) value and delta the advancement of that count vs the time you needed to minimally wait.
Simplistically
start = TIM2->CNT;
while((TIM2->CNT - start) < 100) {} // in a 10us from 10 MHz sense