void ADC_Driver_InitializeADC(void)
{
peripheralADC1Init();
ADC_Activate();
}
void peripheralADC1Init(void)
{
LL_ADC_SetTriggerFrequencyMode(ADC1, LL_ADC_TRIGGER_FREQ_HIGH);
// Structure for some features of ADC common parameters and mul...
Here is my code for IWDGLL_IWDG_EnableWriteAccess(IWDG);
// Set the prescaler value of 8 to the IWDG
LL_IWDG_SetPrescaler(IWDG, LL_IWDG_PRESCALER_8);
// Specify the IWDG down-counter reload value
LL_IWDG_SetReloadCounter(IWDG, 2000);
...
I'm trying to configure ADC for stm32 NUCLEO-U575-ZI-Q and while generating the code using LL drivers noticed the start-up time for ADC voltage regulator and need to know what actually is 100000, 2 and 10 . Same screenshot is attached with it. Thanks...
I have a model file(.h5) and Analyze is failing with keras(.h5) model at STMCubeMX and throwing INTERNAL ERROR: The layer has never been called and thus has no defined input shape.Need help in understanding the issue and resolution for the same.My mo...
Thanks for the reply and I'm using required delays.When I try to enable the Voltage regulator(ADVREGEN = 1) but LDORDY bit that denotes that the Voltage regulator is running isn't set. What might be the issue?
Thanks for the suggestion @raptorhal2 ,I'm referring the same example suggested by you and got a problem while calibration.I'm setting the ADCCAL bit and it is not resetting ( As per the reference manual that bit should reset on its own when the Cal...
Calibration is must for Differential mode as they mentioned. But I'm using my ADC in single mode only. ADSTART is to start conversion.But BEFORE that ADCRDY should be set to ensure that ADC is enabled and it is done by writing ADEN bit even after wri...
Sorry @Community member and @Mike_ST , I didn't your response. Did you mean that the while loop and calculation that I'm using is not related to ADC Voltage Regulator?If not what and how to know the start-up time that Voltage Regulator requires? ...
I got the similar error as I were using the reference code from 7.0.0 and found that with upgradation of Software pack from 7.0.0 to 7.1.0. There is a new way of assigning the input and getting the output. You can check that if that's the mistake if ...
