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low latency streaming audio over IP --- NUCLEO-H723ZG

SWenn.1
Senior III

‎2024-09-27 09:31 AM

I am looking to stream audio over an ethernet connection to a cellular hot spot.  This will be low latency.  Can someone tell me what STM32 firmware library I should use and if this is an appropriate hardware for that task?

 

Thanks

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SWenn.1
Senior III

‎2024-10-03 01:12 PM

@LCE ...

Firstly I apologize for the length here.....In short I am just trying to get a ping tx and rx from a nucleo....Most is sharing of what I have done / setup....Hoping you can enlighten me to something I may have missed??

I received my nucleo board NUCLEO-H723ZG.  I followed the following video instructions:
https://www.youtube.com/watch?v=8r8w6mgSn1A&list=PLfIJKC1ud8ggZKVtytWAlOS63vifF5iJC&index=1 

as best as I could given the RMII vs his MII as well as sizes because the 723 is smaller and the code compiled and I do not get fault errors when running.  However I do get Destination Host Unreachable constantly.

My CubeMX ethernet settings are:

 

SWenn1_1-1727985289250.png

LWIP settings:

SWenn1_2-1727985487034.png

SWenn1_4-1727985677325.png

The sizes keep everything within SRAM1 per the datasheet (0x30000000 - 0x30003FFF)....

I altered the xxx_FLASH.Id file with :

  .lwip_sec (NOLOAD) :
  {
    . = ABSOLUTE(0x30000000);
    *(.RxDecripSection)

    . = ABSOLUTE(0x30000060);
    *(.TxDecripSection)

    . = ABSOLUTE(0x300000C0);
    *(.RxArraySection)
  } >RAM_D2

and finally the ethernetif.c file to :

ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection")));   /* Ethernet Tx DMA Descriptors */

#endif

#if defined ( __ICCARM__ ) /*!< IAR Compiler */
#pragma location = 0x30000100
extern u8_t memp_memory_RX_POOL_base[];

#elif defined ( __CC_ARM ) /* MDK ARM Compiler */
__attribute__((section(".Rx_PoolSection"))) extern u8_t memp_memory_RX_POOL_base[];

#elif defined ( __GNUC__ ) /* GNU */
__attribute__((section(".Rx_PoolSection"))) extern u8_t memp_memory_RX_POOL_base[];
#endif

/* USER CODE BEGIN 2 */
RxBuff_t rxBuff[ETH_RX_BUFFER_SIZE] __attribute__((section(".RxArraySection")));
/* USER CODE END 2 */

so that the sections exist.

When I run I don't crash or hang up but I do notice that in the Build Analyzer section I do NOT get the .RxAarraySection to show up.  And here is the confusing part...Notice RAM_D1 seems to be showing the RxDecriptSection, etc at 0x24000000 space vs RAM_D2....From your experience can you shed any light on this?

SWenn1_5-1727986236627.png

Thanks

Steve

 

 

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LCE
Principal

‎2024-10-04 06:02 AM

Alone seeing this "RxDecriptSection" from Cube gives me the creeps... :D But I'm a little oversensitive with things like that.

Anyway,

0) RMII should be no problem, setup is handled well be Cube.

 

1) It's important that the descriptors are in SRAM1, the TX / RX buffers can also be in AXI SRAM - where you actually placed the lwip pool (used for lwip packet buffers "pbuf"), which is okay.

Check RM0468, 2 Memory and bus architecture, it starts with a table which bus master (incl. ETH DMA) can access which RAM or peripheral.

2) rxBuff: the declaration looks good, so is that actually used somewhere? Should be... but I don't use the ETH HAL driver.

I would debug with a breakpoint somewhere in "ethernetif.c" where ethernet data is received and given to lwip.

 

As I said, it will be lots of work, with lots of frustration - but the H7 can do it!

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