L1 EEPROM: same as L0 ?

[LCE]

Heyho,

still checking L1 for new project, next question:

Are the L1's internal EEPROM register interface, erase, read, and write functions the same as on L0 (we're already using that) ?

Obrigado!

[gbm]

Why don't you check it in the Reference Manuals for both chips?

[Andrew Neil]

I guess the big question is, "Are there any Gotchas! which might be missed in reading the RM" ... ?

The devil is often in the details ...

[LCE · Accepted solution]

AI search says:

Conclusion

Yes, the internal EEPROM interface of STM32L0 and STM32L1 is fundamentally the same in terms of register-level access, reading/writing methodology, and control procedures. Minor differences may exist in timing and total EEPROM size based on specific MCU models, but porting code between L0 and L1 for EEPROM operations is generally seamless.

... so far good enough for me - compared with a quick RM-register comparison.

[LCE]

Well, I hoped for a quick and simple "yes, identical" by some ST guys.

Saving time...

[LCE]

If we choose the L1, I'll find out when using the L0 functions I have... :D

[Andrew Neil]

You could always check it out on a Nucleo board ...

[LCE]

Next step if L1 is the "chosen one". :D