2021-07-16 12:32 AM
If I understand correctly, the answer is YES (cannot support level triggered interrupts), only rising/falling edges. If there is an alternate method (read HACK), I'd be interested to hear it.
Thanks in advance.
John W.
2021-07-16 02:38 AM
2021-07-16 11:09 AM
Maybe you need explain more what you need, but Level based interrupts can be simulated with TIMER CC interrupts with read GPIO state checks.
Here you have control on speed for repeated IRQ when level no change...
2021-07-25 06:43 AM
Apologies for not responding sooner. First, I want to say that not having level-triggered interrupts is not a show stopper. I'm perfectly willing to put an RC + schmitt trigger on the interrupt pin, though I haven't found voltage/timing info for the internal schmitt trigger buffers on the STM32s. I just wanted to be absolutely clear about what is possible, and was hoping to eliminate some external circuitry. Second, what you are suggesting is interrupt driven polling, or, "polling with extra steps" (I'm guessing/hoping that you get the reference, but if not, it's a Rick and Morty thing) which pretty much defeats the purpose of interrupts.
Be that as it may, here is my use case scenario. While many MCUs incorporate both a USB/OTG host interface as well as a USB device interface, the STM32H7xx does not. Instead, it sports a single USB interface either in USB host or USB device mode at any one time. In addition, USB 2.0 HS operation requires an eternal USB PHY connected via ULPI while USB 2.0 FS operation is supported via on chip PHY. Note that on chip PHY (FS) and ULPI external PHY (HS) can be assigned to entirely separate GPIO pins.
So, in my design, the USB interface will under normal operating conditions be in HS host mode (via ULPI). However, it is desirable for the USB interface to be able to switch to device mode in order to support DFU (firmware update) and CDC (console/monitor) activities. Since the FS PHY (on chip) and HS PHY (off chip-ULPI) live on separate GPIO pins, it is possible to connect on chip (FS) PHY to to a USB type B (female, upstream) connector, while the (downstream) ULPI connection can be either a type A female connector or a USB 2.0 hub with additional downstream (female, type A) connections. Other topologies are possible but I don't want to go too far down the USB rabbit hole. Suffice it to say that a connection via the type B connector would put the USB subsystem into device mode, overriding any connections on the type A connector(s) (see below).
The operating principle to achieve (serial) host and device mode function is to sense the +5V on the USB type B female connector upon connection to a putative USB host and then force a reset on the USB subsystem which would then sample the voltage on the USB type B connector during initialization to determine whether to go into host or device mode as well as initializing the appropriate PHY for same.
Thus, mechanical insertion of a male type B cable into the female type B connector would cause an interrupt on the STM32H7xx, reset the USB subsystem into device mode on the on-chip (FS) PHY, and then proceed apace into DFU or CDC mode, according to USB host (PC/Mac) operations. Needless to say, ordinary (human caused) physical insertion of a USB cable is unlikely to produce a clean edge for interrupt purposes (hence the interest in level triggered interrupts), but appropriate signal conditioning (RC + Schmitt trigger) will generate a suitable rising edge for the EXTI device on the STM32H7xx in order to effect an interrupt causing the USB subsystem to reset into device mode. Additionally, removal the the USB cable would produce a suitable falling edge for the EXTI device to effect reset into USB host mode.
I realize this is something of a hack, but it doesn't strike me as a terribly ugly one (no more so than USB itself), and it is certainly not bulletproof. Doubtless, jerking the mechanical type B connector around enough would probably cause failure, but I'm willing to live with that. Anyway, you asked what I am trying to do so there it is. Any thoughts or insights would be appreciated.
Regards, John W
2021-07-25 01:15 PM
Hi John,
Yes, the discussion under the link I gave is about a hack.
Also, we might have different idea about level-triggered interrupt. In my book, the only difference between edge-triggered and level-triggered interrupt is, that level-triggered keeps throwing the interrupt as long as the interrupt input is at its active level. I'm not sure how would that exactly help with a noisy interrupt signal.
However, instead of using EXTI, you may consider using some timer's channel in input capture mode. These channels feature a digital filter, and the timer itself can be used for a longer delay if needed.
Btw. the 'H743 does have two OTG modules, it's the 'H7A3 which has only one, so the rest of marking here matters.
JW
2021-07-25 01:20 PM
Whatever you do... Keep It Simple.