Is it reasonable to put a STM32H7A3 to sleep 14,000 times a day every day for a year?

[magene]

We've developed an oceanographic profiling float that runs unattended at sea for as long as the batteries last. In normal operation, the float sits on the ocean bottom, wakes up every 6 hours and ascends to the surface acquiring data as it goes up. When the system wakes up, it acquires data from a suite of sensors every second. It takes less than 200 milliseconds to get all the data from all the sensors. A profile takes up to an hour so: 1 hour * 4 times per day * 3600 seconds/hour = 14,400 data acq. cycles per day. We have the ability to turn off power to the rest of the system and the whole system can wake in a 100 milliseconds or so. Given that the whole system is idle for about 80% of every second, does it seem reasonable to put the STM32H7A3 MCU in one of its lower power modes, maybe the lowest power standby mode, for something like 700 milliseconds every second for an hour, 4 times a day every day for a year?   

[Issamos]

Hello @magene 

Generally, the STM32H7A3 can support interring and living any low power mode Every second for a Lifetime. You can make sure of that using a simple test by running a code that take measurements and enter low power mode than live this low power mode and execute the same program again every one second for  24 consecutive hours (24*3600) or for more time if you want.

Best regards.

II

[Pavel A.]

Agree with @Issamos  - tests and measurements are your best friends. You can find that reducing the MCU clock together with turning off clocks of some blocks delivers enough power saving. You may even find that during the "busy" hour the MCU is not the biggest consumer of power so it does not make sense to enter sleep, rather use simple wfi/wfe and a 'tickless' timer.

[MrLuck]

Putting an STM32H7A3 to sleep 14,000 times a day every day for a year is generally reasonable, but it depends on the specific application and power requirements. Microcontrollers like the STM32 series are designed to handle frequent sleep-wake cycles. However, factors like the power source, sleep duration, and overall power consumption should be carefully considered to ensure efficient operation and battery life in your application. Proper power management and sleep mode configuration are crucial for successful implementation.

[magene]

Thanks for the input.  I'm planning on running a test, just wanted some other opinions to make sure this wasn't another one of my dumb ideas.  I'll post my results when I have some.

[Issamos]

The best idea is always to test all possible cases. When your question is answered close the topic by choosing a best answer.

Best regards.

II

[LCE]

Question to the pros:

Assuming that the firmware ist perfectly stable, are there any drawbacks to high frequency wake up / sleep cycles?

Is there any "wear and tear" on the semiconductors or any passive components that I don't know of (apart from non-ceramic capacitors at higher currents) ?

About 15 years ago I built some meteorological equipment which was supposed to run for 10 years on a battery, so the used ATmega woke up once per second for a short time as possible. So these still seem to work, as the company recently told me.

But that's nothing compared to my latest STM32 design, where I found that I had to sleep the CPU (__WFI) as often as possible so that DMAs accesses to the busses is not hindered by useless CPU stuff. So that one goes to sleep a few thousand times per second, and that device is supposed to run for 16 hours per day (still in development, for now it's working flawlessly).

[JBURB]

Hello,

the strategy to use low power mode can be tricky. Perhaps to find the appropriate configuration, you could use the tool provided by CubeMX: PCC. You can define a sequence of run/sleep/stop/standby and get an average current:

Br,

Jacky