Interfacing a M7 series STM with a 12-bit parallel ADC for radar application

[mohandas98]

I want to use an parallel 12-bit or 14-bit ADC with STM 32 bit MCU. I am guessing the best way is to use DCIM to interface with the ADC. The sampling clock need not be very high (< 2 MHz). But i need continuous samples with no interruptions. Can someone suggest a reference design for this? Is using GPIOs better and using DCIM?

[MasterT]

GPIO on F7 can read about 10 MHz at max, having uCPU 100% load. Can't tell regarding DCIM, unlikely it can operate with 10 psec jitter, those interfaces do "gaps" in data stream for useconds.

 I'd suggest 595 shift registers and feed data to SPI

[mohandas98]

Thanks. Can I get more electrical details on the internal ADC such as SNR, SFDR etc. Also, I am assuming in continuous sampling mode, the same channel can be sampled in a loop?

[MasterT]

You can find adc specification data in the data sheet for specific part number. Here is an example for F767

Yes, one channel sampling is supported, using timer to trigger adc "start conversion" and  dma to transfer results to memory, precision in timing - low jitter is guaranteed w/o uCPU interruption.

[mohandas98]

Thanks. I could find specifications for SFDR. Is that something that is not characterized for these ADCs?

[MasterT]

I have no idea, likely SFDR is low for ADC that running in the same package with 3 PLL ( up to 960 MHz) and dozens of peripheral  with it's own clock dividers, spectrum contamination just unpredictable.

Or you can create thread with this question, to get answer from someone working in ST.

[LCE]

Better choose a n ADC with SPI / serial interface.

That will save you a lot of trouble concerning PCB layout and firmware.

Okay, EMI might get worse due to higher clock rates, but you'll probably screw it also with that many parallel data lines anyway...