Interfacing 32-bit SDRAM with STM32H750XBH6

[Geethat]

Hello ST Support Team,

I’m currently designing a custom board using STM32H750XBH6.
In this design, I would like to interface a 32-bit SDRAM for improved memory bandwidth and performance.

However, I noticed that in the official STM32H750 development board (Nucleo/Discovery), the same MCU (STM32H750XBH6) is connected to a 16-bit SDRAM interface only.

I would like to confirm the following points:

1. Is it possible to interface a 32-bit wide SDRAM with the STM32H750XBH6?

2. If yes, are there any pin multiplexing conflicts or hardware limitations on the FMC (Flexible Memory Controller) that I should be aware of?

3. Any reference schematics, Cube MX configuration tips, or verified examples for 32-bit SDRAM with STM32H7 would be very helpful.

Your technical guidance will be very valuable to me in finalizing this design.

Thank you.

[mƎALLEm]

Hello,

There is no limitation on STM32H750 for a 32-bit SDRAM usage. On the disco board there was a decision to use a 16-bit SDRAM to save GPIOs for other functions on the board.

You can refer to the STM32H743-EVAL schematics:

It contains a 32-bit SDRAM.

For Software config, you can refer to the SDRAM example provided for STM32H743-EVAL (no ioc file available): https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Projects/STM32H743I-EVAL/Examples/FMC/FMC_SDRAM

See main.h file:

/* #define SDRAM_MEMORY_WIDTH            FMC_SDRAM_MEM_BUS_WIDTH_8  */
/* #define SDRAM_MEMORY_WIDTH            FMC_SDRAM_MEM_BUS_WIDTH_16 */
#define SDRAM_MEMORY_WIDTH               FMC_SDRAM_MEM_BUS_WIDTH_32

The example is compatible with STM32H750. You need just to rework your timing and your GPIOs if needed.

Hope that helps.

[Tesla DeLorean]

I just checked the ART-Pi board, and that was 16-bit SDRAM

But as @mƎALLEm indicates the H750 is the same IC as the H743/H753 just with the lower 128KB of FLASH tested and the CRYP/HASH unit enabled.

The EVAL board probably the primary example. I think there's a RIVERDI H7 board with an 8 MB (64Mb) 32-bit wide data bus, but the schematic didn't immediately pop up.

The primary challenge would be pin escape as here aren't many pin mux options. Conflicts might occur if you have other memories on the bus. But as I recall the QuadSPI pins should be totally independent. The alternative is to load firmware to SDRAM via eMMC/SDMMC