Insights on possible values for ADC input voltage swing using external VREF

[Chubs]

Hello Community,

We are designing a simply cost sensitive Temperature sensing solution using low-cost Linear Thermistors TMP61Q1 from TI, and wish to use the internal ADCs on STM32G474RCT3 MCUs, this is an LQFP64 package with a dedicated VREF Buffer Pin which can drive output loads at 2.048V, 2.5V, 2.9V with 6.5mA.

We wish to understand in detail, can we use this VREF BUFF pin and add an external voltage reference of say 1V & then reduce the ADC input voltage swing to 0-1V for the entire 12-bit dynamic range?

Or can we set the VREF Buffer to 2.048V & use the ADC with VREF Internal channel such that the ADC Voltage swing becomes 0 to 2.048V for entire 12-bit range?

Or can we simply supply VDDA 1V & keep the ADC maximum voltage swing between 0 to 1V for the entire 12-bit resolution?

Kindly guide us with this use case, as the sensor output has a limited voltage swing & using a non-inverting amplifier is not a feasible option cost-wise.

Both I & my team are fairly new to the Analog circuit design & are looking forward for a good starting point to understand the ADCs on STM32G474 from the community.

Regards

[waclawek.jan]

> You can use an external reference of 1V.

As TDK already wrote above, you can't.

JW

[MasterT]

I wouldn't change Vref, from my experince with nucleo-G474re board (has a jumper to select Vdd or LM431 as external reference, and option to select Internal Vref if jumper is OFF).

Noise is quite high when internal ref selected, seems output impedance of the internal circuitry is high value and that require cureful managment of the: sampling clock duration/ sampling rate / monitor spacing if many ADC in use so they do not sample simulteneoulsy. In short it doesn't worse a trouble to get x1.5 better resolutioon. 

Another option as termosensor always slow:

1.use hardware oversampling to get 16-bits, and more bits if software averaging after that. 

2. use differential mode to lower noise

[waclawek.jan]

> require careful management of the: sampling clock duration/ sampling rate / monitor spacing if many ADC in use so they do not sample simultaneously

Generally, ADC in 'G4 appears to be picky, in comparison to e.g. 'F3 (which 'G4 is supposed to replace), see ADC-related errata and the 'G4-ADC-specific AN5346.

JW

[MasterT]

There are pins:

/*
    Table 1.  OPAMPs inverting/non-inverting inputs for the STM32G4 devices:
    +--------------------------------------------------------------------------------------------+
    |                 |        | OPAMP1   | OPAMP2   | OPAMP3   | OPAMP4   | OPAMP5   | OPAMP6   |
    |-----------------|--------|----------|----------|----------|----------|----------|----------|
    |                 | No conn|  X       |  X       |  X       |  X       |  X       |  X       |
    | Inverting Input | VM0    | PA3      | PA5      | PB2      | PB10     | PB15     | PA1      |
    | (1)             | VM1    | PC5      | PC5      | PB10     | PD8      | PA3      | PB1      |
    |-----------------|--------|----------|----------|----------|----------|----------|----------|
    |                 | VP0    | PA1      | PA7      | PB0      | PB13     | *PB14     | PB12     |
    |  Non Inverting  | VP1    | PA3      | PB14     | PB13     | PD11     | PD12     | PD9      |
    |    Input        | VP2    | PA7      | PB0      | PA1      | PB11     | PC3      | PB13     |
    |                 | VP3    | DAC3_CH1 | PD14     | DAC3_CH2 | DAC4_CH1 | DAC4_CH2 | DAC3_CH1 |
    +--------------------------------------------------------------------------------------------+
    (1): No connection in follower mode.

    Table 2.  OPAMPs outputs for the STM32G4 devices:
    +--------------------------------------------------------------------------------+
    |                 |        | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 |
    |-----------------|--------|--------|--------|--------|--------|--------|--------|
    | Output          |        |  PA2   |  PA6   |  PB1   |  PB12  |  PA8   |  PB11  |
    |-----------------|--------|--------|--------|--------|--------|--------|--------+
    | Internal output |        |  ADC1  |  ADC2  |  ADC2  |  ADC5  |  ADC5  |  ADC4  |
    | to ADCs         |        |  CH13  |  CH16  |  CH18  |  CH5   |  CH3   |  CH17  |
    |                 |        |        |        |  ADC3  |        |        |        |
    |                 |        |        |        |  CH13  |        |        |        |
    |-----------------|--------|--------|--------|--------|--------|--------|--------+

about 19 pins just non-inverting inputs. Only non-inverting pin required for external connection with sensor, output of the OPA may have link to ADC w/o pin use, same with inverting input - PGA matrix may not have any external pins.

It's hard to believe that no free pins left, "there is a will there's a way".

PGA provides x64 time amplification, compare to x1.5 with Vref manipulation, difference is enormous x42 (!)

[RhSilicon]

About sensor curve, TMP61-Q1, it reminded me of sensor curve KTY84. In the KTY84 datasheet it says that it is "Virtually Linear" note that there is a deviation, the curve is not completely linear (which would be a straight line, not a parabola) some compensation may be needed depending on the range and accuracy desired. On a device that uses the KTY84 I had to deviate the extremes via trimpot calibration, so that the center of the curve was closer to the average.

I am including the TMP117 sensor (+/-0.1°C) in another project that was operating with the DS18B20. This TMP117, despite being expensive compared to a thermistor, seems to be worth it, since it is a digital sensor, I2C bus (it could be even better if it were 1-wire like the DS18B20).