I would like to know To configure the I2C bus of STM32F439 in receive and transmit mode, which bit must be Set/Reset and in which register it is located, and how it is append to the Address byte...Thanks

[Nikita91]

Look at the application note AN2824:

https://www.st.com/resource/en/application_note/cd00209826-stm32f10xxx-ic-optimized-examples-stmicroelectronics.pdf

I2C is a complicated bus. And on STM32 I2C is even more complicated.

It is not enough to position a few bits ...

[ACris.1]

Thanks Nikita, I already know this application and I am aware that there are many bits to be managed, unfortunately I am using a component (BQ27520-G4) which provides some operating modes for which you need to switch between the transmission and reception phases, skipping the Stop condition. Using the HAL available from ST it is not possible to reach this condition. To solve everything I'm trying to create a suitable driver. I read the manual of the STM32F439 but I have not found which bit must be configured to switch from TX mode to RX mode, for the other conditions I think that I understand everything (hope).

[Piranha]

> switch between the transmission and reception phases, skipping the Stop condition

HAL_I2C_Mem_***() functions do this. But it doesn't change the fact that HAL is non-working bloatware.

Read RM0090 section 27.3.3. Page 849:

Master receiver

Following the address transmission and after clearing ADDR, the I2C interface enters Master Receiver mode.

[ACris.1]

Thanks Piranha,

please help me to understand the Master Receiver how does it works: as soon as the 7th bit of the address has been transmitted, I can change the 8th bit (from 0 to 1), clearing ADDR bit, in this way the receive phase is started, is it right?

Thanks a lot for any suggestion you can give me