2019-11-16 01:19 AM
Registers Setting:
DMA_S0CR: MSIZE=PSIZE=16bit, DBM=1, MINC=1, CIRC=1, DIR=M2P, TCIE=1, EN=1
DMA_S0NDTR = 8
DMA_S0M0AR points to a buffer: 0x8000, 0x6000, 0x4000, 0x2000, 0x0000, 0x2000, 0x4000, 0x6000
DMA_S0M1AR points to a buffer: 0x7000, 0x5000, 0x3000, 0x1000, 0x0000, 0x1000, 0x3000, 0x5000
When TCIF0 interruption occurs, I toggle the green GPIO to indicate transfer completed.
Trigger: TIM6 generates TRGO when EN and UPDATE.
I got an interrupt at time point 1(red arrow), Is this the time when DMA finished reading from memory? why doesn't it occur at the next trig ? (There are only 7 trigs from begining, not 8).
But, the important qestion is, how can I got the interrupt at time point 2 ?, because I think this time point is a right time to stop the DAC output when a full periodic signal has finished.
2019-11-17 08:24 AM
Read the DAC chapter - DMA writes to DHR register when it's empty, and it gets transferred to DOR register by the trigger (coming from timer).
At 1, what happened was, that a trigger arrived from timer, 0x4000 got transferred from DHR to DOR thus the output pin's level changed appropriately, DOR got empty, subsequenly DMA tranferred 0x6000 into DAC_DHR (where it remained until the next trigger), and as that was the 8th transfer, it threw the TC interrupt.
> But, the important qestion is, how can I got the interrupt at time point 2 ?
One way to achieve that would be to count to 8+1 (and subsequently to 8) in an interrupt triggered by the same timer which triggers the DAC.
JW