I have an STM32F411RE nucleoboard. I tried to test my delay fnc with input cpature mode. It seems the prescaler not divide the frequency only after overflow of the capture compare register.
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‎2021-11-03 9:37 AM
Hi everybody!
First of all sorry for my language. I just started to learning programming of STM32. My problem is that i made a delay function. I wanted to test it with the input capture mode. I setted the prescaler to 16000 - 1. I wanted to get an 1000 Hz sampling. When I start to debug the project as you can see in the microsecs_wrong.png file, the difference between the timestamps is 32.000.000. The interesting part is when the capture compare register reaches 4294967295 (2^32 - 1) it overflows and start to works properly (microsecs_proper_working.png). The difference between timestamps now is 2000. Why is that happening?
Thanks for Your help!! :)
Solved! Go to Solution.
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DEBUG
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STM32F4 Series
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TIM
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‎2021-11-03 9:57 AM
The PSC and ARR registers are preloaded by default. If you want them to take effect immediately, generate an update event after setting it but before enabling the timer.
TIM2->EGR = TIM_EGR_UG;
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‎2021-11-03 9:57 AM
The PSC and ARR registers are preloaded by default. If you want them to take effect immediately, generate an update event after setting it but before enabling the timer.
TIM2->EGR = TIM_EGR_UG;
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‎2021-11-03 10:18 AM
It works fine! Thank you!! :)
