I'm bringing up a design based off the STM32H573 and I believe I'm having a number of issues that are probably sharing a common thread with bad hardware. I don't usually screw those things up, but I guess I got unlucky this time.
1) PC1 when configured as a (GPIO) output cannot drive a load. Works as a GPIO input. Sometimes, when configured as output after configuring it as input, it would start working and then die (this happened twice in two days). Pulls, OD, nothing seems to make a difference. Replicated over two boards -- the second board with no ESD damage possible.
2) HSI seems to be off by 9% (HAL_Delay and UART are showing this error). Tested on one board only.
Here is my schematics:
In my actual board, both VCAPs are not tied together. They are also not placed on the bottom of the board -- rather they are connected via a 0.1mm trace 3.5mm long to the edge of the BGA to the capacitor. Altium is saying this can carry 0.6A I guess impedance is bad and it might be the source of some of my issues (I can decrease the op frequency if so).
I also didn't place the bypass capacitors on the bottom of the board, but as the vias were there, I managed to add them manually (scrape soldermask on vias etc). It didn't make any difference I could see.
I'm really lost here. I think the issue must be hardware, but what should I try to fix it? I can't imagine a failure mode that fries the same GPIO on two boards and offsets HSI... But maybe the HSI is random and the GPIOs were fried by something connected externally -- aka the STM design is actually acceptable?
HSI has been known to be off from the factory before on some chips, despite claims in the datasheet that it is calibrated at the factory. It is trimmable, but probably not enough to make up 10%. See if your code is applying a trim at all. See if HSICAL has any value at all. A 0 might indicate it was not trimmed at all.
Note that HAL_Delay is not an exact delay. But if you did HAL_Delay(1) in a tight loop and toggled a pin, you should see it toggle every 2ms on a scope. Routing MCO out would be a better test.
Design seems fine to me. Don't think anything there will affect HSI. Bypass caps should be 0.1 uF, not 1 uF. Probably fine, however.
Don't see any details about PC1 connections. Comparing IDR and ODR values may shed light. If it's shorted to something, output will not work. Should see a ~20mA current draw increase as it tries. GPIO pins aren't flaky. Gotta be something specific to your setup.
